Techniques for calculating currents and voltages in VLSI power supply networks

Stark, D.; Horowitz, Mark

doi:10.1109/43.46778

Cited by 34 publications

(15 citation statements)

References 6 publications

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“…The problem of power/ground (P/G) network synthesis has been studied extensively in the literature [1,2,3,6,7,8,9,10,11,12]. An important problem of P/G network synthesis is to use the minimum amount of silicon area for wiring P/G network under the constraint of potential reliability such as IR drops and electromigration.…”

Section: Previous Workmentioning

confidence: 99%

“…To further reduce the complexity, we can apply the techniques presented in [8,11] to further reduce the P/G network. Consider a series of resistors as shown Figure 7(a).…”

Section: P/g Network Reductionmentioning

confidence: 99%

“…Suppose that the current flows across resistor R i is from N i to N i+1 . Such a series of resistors can be modeled by an equivalent circuit shown in Figure 7(b) [8], where the current flows from N 1 to Nn. The equivalent resistor Rs is the sum of all the series resistance:…”

Section: P/g Network Reductionmentioning

confidence: 99%

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Efficient power/ground network analysis for power integrity-driven design methodology

Chang

2004

Proceedings of the 41st Annual Design Automation Conference

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As technology advances, the metal width is decreasing with the length increasing, making the resistance along the power line increase substantially. Together with the nonlinear scaling of the threshold voltage that makes the ratio of the threshold voltage to the supply voltage rise, the voltage (IR) drop become a serious problem in modern VLSI design. Traditional power/ground (P/G) network analysis methods are typically very computationally expensive and thus not feasible to be integrated into floorplanning. To make the integration of the P/G analysis with floorplanning feasible, we need a very efficient, yet sufficiently accurate analysis method. In this paper, we present the methods for the fast analysis of the P/G networks at the floorplanning stage and integrate our analyzer into a commercial tool to develop a power integrity (IR drop) driven design methodology. Experimental results based on three real-world circuit designs show that our P/G network analyzer is accurate enough and very efficient. In particular, with our floorplan-based P/G network analyzer, the power integrity-driven design flow successfully fixed the IR-drop errors earlier at the floorplanning stage and thus enabled the single-pass design methodology.

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Section: Previous Workmentioning

confidence: 99%

“…To further reduce the complexity, we can apply the techniques presented in [8,11] to further reduce the P/G network. Consider a series of resistors as shown Figure 7(a).…”

Section: P/g Network Reductionmentioning

confidence: 99%

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Efficient power/ground network analysis for power integrity-driven design methodology

Chang

2004

Proceedings of the 41st Annual Design Automation Conference

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“…Some of the early work on power grid analysis used DC analysis to obtain the IR drops [1][2][3]. The variations in current profiles of the functional blocks are often obtained by simulation [1,7,9,10].…”

Section: Introductionmentioning

confidence: 99%

Stochastic Power Grid Analysis Considering Process Variations

Ghanta

Vrudhula

Panda³

et al.

Design, Automation and Test in Europe

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“…A method for simulating the voltage fluctuations in a resistive power supply network has already been reported [1]. In this method, the currents that enter the power supply are calculated and applied to the resistor network.…”

Section: Introductionmentioning

confidence: 99%

An efficient logic/circuit mixed-mode simulator for analysis of power supply voltage fluctuation

Miyama

Yokomizo

Iwabuchi³

et al.

Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 With EDA Technofair

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Abstract---A mixed-mode simulator is described that can simulate voltage fluctuations in the power supply network. Current flow due to logic events is taken into account in order to predict the voltage fluctuations. The difference between the maximum voltage fluctuations calculated by the proposed mixed-mode simulation and these calculated by conventional circuit simulation are within 20%, and we demonstrated the feasibility of the proposed simulation by simulating an entire MOS memory chip (36,000 transistors) in 75 minutes on an HP9000/735.

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Techniques for calculating currents and voltages in VLSI power supply networks

Cited by 34 publications

References 6 publications

Efficient power/ground network analysis for power integrity-driven design methodology

Efficient power/ground network analysis for power integrity-driven design methodology

Stochastic Power Grid Analysis Considering Process Variations

An efficient logic/circuit mixed-mode simulator for analysis of power supply voltage fluctuation

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