Technique for fast triangular chirp modulation in FMCW PLL

Abstract

Frequency-modulated continuous-wave (FMCW) radars necessitate fast frequency modulation. However, finite loop bandwidth of a phase-locked loop (PLL) limits the accuracy of fast frequency modulation. This paper proposes a phase compensation (PC) technique to address this limitation. The synthesizer PLL with the PC technique realizes fast and precise triangular chirp modulation by adding a compensating square wave phase before the integral path of the loop filter. The synthesizer is designed in 130-nm SiGe BiCMOS technology. Simulation results show rms frequency error improvement of 18 times over conventional PLL with a chirp bandwidth of 2.56GHz and 20μs chirp period at 94GHz.

A high-linear PLL-based FMCW frequency synthesizer with 42-kHz rms FM error and 1.2-GHz chirp bandwidth

“…Analog fractional-N PLLs [23][24][25][26][27][28] provide better phase noise and chirp linearity. Techniques including phase compensation [29], nested-PLL-based FMCW modulator [30] and cascade PLLs [31] have been developed to improve the chirp linearity. However, the additional circuits in those PLLs lead to significantly higher power consumption and die area, posing challenges in circuit miniaturization and energy efficiency.…”