TA-Quatro: Soft Error-Resilient and Power-Efficient SRAM Cell for ADC-Less Binary Weight and Ternary Activation In-Memory Computing
Thanh-Dat Nguyen,
Minh-Son Le,
Thi-Nhan Pham
et al.
Abstract:Some applications, such as satellites, require ultralow power and high-radiation resilience. We developed a12Tsoft error-resilient SRAM cell, TA-Quatro, to deliver in-memory computing (IMC) for those applications. Based on our TA-Quatro cell, we implemented an IMC circuit to support binary weights and ternary activations in a single SRAM cell. Our simulation under 28 nm FD-SOI technology demonstrates that the TA-Quatro IMC circuit maintains good IMC stability at a scaled supply of 0.7Vand achieves ternary acti… Show more
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