Systematic Design of High-Resolution High-Frequency Cascade Continuous-Time Sigma-Delta Modulators

Abstract

Ramón Tortosa (email: castro@imse.cnm.es) was with CSIC-IMSE-CNM, Sevilla, Spain, and is currently with Analog Devices, Ireland.Rafael Castro-López (phone: +34955056666), email: castro@imse.cnm.es), J.M. de la Rosa (email: jrosa@imse.cnm.es), Elisenda Roca (email: eli@imse.cnm.es), Ángel Rodríguez-Vázquez (email: angel@imse.cnm.es), and F.V. Fernández (email: pacov@imse.cnm.es) are with CSIC-IMSE-CNM and University of Sevilla, Spain. I. IntroductionThe ever shrinking minimum feature size of CMOS technologies has triggered a revolution in integrated designs, from application-specific integrated circuits to entire systems on a single chip. Notwithstanding, a critical design productivity lag has been reported [1]. With a productivity growth rate of 21%, compared to a 58% complexity growth rate, design cost is increasing rapidly. Taking into account the ever demanding time-to-market pressures, this picture is clearly worrisome. For analog and/or mixed-signal design the situation is even worse for many reasons, the most significant being the lack of commercial computer-aided design tools and methodologies to efficiently support the analog design.The design methodology described in this paper tries to reduce this design gap for a class of circuits, namely, continuous-time (CT) cascade sigma-delta (ΣΔ) modulators (conceptually shown in Fig. 1), although some of the techniques and tools presented are applicable to other classes. The choice of this circuit class has been driven by the demands of new generations of high-speed wireless and wireline communication terminals, which require broadband analog-todigital converters capable of digitizing 20 MHz wideband signals with effective resolution over 12 bits and with minimum power consumption. Although most reported ΣΔ modulators have been implemented using discrete-time (DT) circuits, the increasing demand for broadband data communication systems has motivated the use of CT techniques. In addition to showing an intrinsic anti-aliasing filtering, CT ΣΔ modulators can potentially provide faster operation with lower power consumption than their DT counterparts [2], [3].