Systematic approach for deriving feasible mappings of parallel algorithms to parallel computing platforms

Abstract

The need for high-performance computing together with the increasing trend from single processor to parallel computer architectures has leveraged the adoption of parallel computing. To benefit from parallel computing power, usually parallel algorithms are defined that can be mapped and executed on parallel computing platforms. In general, different alternative mappings can be defined each with different performance. For small computing platforms with a limited number of processing nodes, the mapping process can be carried out manually. However, for large-scale parallel computing platforms in which hundreds of thousands of processing nodes are applied, the number of possible mapping alternatives increases dramatically, and the mapping process becomes intractable for the human engineer. To assist the parallel computing engineer, we provide a systematic approach to derive feasible mapping alternatives of parallel algorithms to parallel computing platforms. The approach includes activities for modeling the parallel algorithm and parallel computing platform, generation of feasible mapping alternatives, generation of the deployment code, and finally the deployment of the generated code to the nodes. We evaluate our approach for deriving feasible mapping alternatives for four well-known parallel algorithms. The evaluation is based on both simulations and real executions of the generated mapping alternatives.

ParDSL: a domain-specific language framework for supporting deployment of parallel algorithms

“…8. The DSL development was an explorative and iterative process that followed after our earlier studies on parallel computing [25,26].…”

“…The section code generation operation calls pattern code generation operation. Within the pattern code generation operation, the codes for data communications is generated using MPI send and receive methods (lines [19][20][21][22][23][24][25][26]. The serial code parts for the tiles are inserted in the final part of the template (lines 27-29).…”

“…In our earlier studies, we have presented the problem of the deployment of parallel algorithms to parallel computing platforms [25,26]. Hereby, we have evaluated several algorithms to execute on multicore computer, a grid simulation environment and a real-world grid platform.…”

“…5. To achieve the results, we have run the program 10 times for each alternative and took the mean value of these runs [26]. The implementation codes are verified to run on such a grid system, but still it is needed to evaluate for larger physical configuration sizes.…”

“…The Eclipse editor provides all the required instruments for debugging and handling code errors. In our earlier studies, we have already provided a full quantitative analysis on the reliability of the allocation process [25,26].…”