Proceedings of the 40th Annual Design Automation Conference 2003
DOI: 10.1145/775832.775943
|View full text |Cite
|
Sign up to set email alerts
|

System-on-chip beyond the nanometer wall

Abstract: In this paper, we analyze the emerging trends in the design of complex Systems-on-a-Chip for nanometer-scale semiconductor technologies and their impact on design automation requirements, from the perspective of a broad range SoC supplier.We present our vision of some of the key changes that will emerge in the next five years. This vision is characterized by two major paradigm changes. The first is that SoC design will become divided into four mostly non-overlapping distinct abstraction levels. Very different … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4
1

Citation Types

0
20
0

Year Published

2005
2005
2011
2011

Publication Types

Select...
5
3

Relationship

0
8

Authors

Journals

citations
Cited by 91 publications
(20 citation statements)
references
References 10 publications
0
20
0
Order By: Relevance
“…Figure 3 illustrates this process with a few examples. Note that array access b [1] in Figure 3 does not use the translation step, since it is a local variable in the native function. The dropin generator needs to distinguish at compile time between pointers that require explicit translation and those which do not, based on the possible memory locations that the pointer may point to.…”
Section: Native Drop-in Generatormentioning
confidence: 99%
See 1 more Smart Citation
“…Figure 3 illustrates this process with a few examples. Note that array access b [1] in Figure 3 does not use the translation step, since it is a local variable in the native function. The dropin generator needs to distinguish at compile time between pointers that require explicit translation and those which do not, based on the possible memory locations that the pointer may point to.…”
Section: Native Drop-in Generatormentioning
confidence: 99%
“…Due to rapid growth in the complexity of embedded software (average software content is estimated to double every 10 to 12 months, i.e., faster than Moore's law [1]), software simulation is becoming the bottleneck in efficient system simulation. In spite of significant research effort over the last decade, software simulation is still very time-consuming for systems of realistic complexity, limiting the scope for architectural optimization and design space exploration.…”
Section: Introductionmentioning
confidence: 99%
“…The continued progress in VLSI technologies allows us to put more cores (from dozens to hundreds) on a single chip to build a system-on-a-chip (SoC) system [11]. This kind of SoC system is commonly found in embedded systems which are prevalent in every aspect of our daily life, such as mobile terminals, portable game consoles, personal media players, etc.…”
Section: Introductionmentioning
confidence: 99%
“…Finally, we conclude in Section 7. Figure 1 shows the system architecture block diagram a typical heterogeneous multi-core SoC [11,18]. In a such system, there is a set of heterogeneous cores (processing elements) of different flexibility and computation characteristics allowing optimal execution of different tasks in the system.…”
Section: Introductionmentioning
confidence: 99%
“…The current deep submicron technology era presents two opposing challenges: rising SoC platform development costs and shorter product market windows [1]. The rising platform development costs are due to four main sources: the continued rise in gate count, the emergence of deep submicron effects, the rising proportion of embedded software development costs, and finally, rising mask set costs.…”
Section: Introductionmentioning
confidence: 99%