System-level energy-efficient dynamic task scheduling

Zhuo, Jianli; Chakrabarti, Chaitali

doi:10.1145/1065579.1065744

Cited by 69 publications

(66 citation statements)

References 13 publications

(20 reference statements)

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“…To overcome these issues and to manage MPSoC power and speed performance, solutions have been proposed at the system level. Task scheduling [Zhuo and Chakrabarti 2005] and task migration [Coskun et al 2008] have been proposed to improve the resource usage and limit static power. DVFS software algorithms have been proposed to improve global speed performance [Herbert and Marculescu 2009] while reducing power consumption [Puschini et al 2008].…”

Section: Power Management Techniques For Mpsocsmentioning

confidence: 99%

A Survey on Low-Power Techniques with Emerging Technologies

Gaillardon

Beigné

Lesecq

et al. 2015

J. Emerg. Technol. Comput. Syst.

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Nowadays, power consumption is one of the main limitations of electronic systems. In this context, novel and emerging devices provide new opportunities to extend the trend toward low-power design. In this survey article, we present a transversal survey on energy-efficient techniques ranging from devices to architectures. The actual trends of device research, with fully depleted planar devices, tri-gate geometries, and gateall-around structures, allows us to reach an increasingly higher level of performance while reducing the associated power. In addition, beyond the simple device property enhancements, emerging devices also lead to innovations at the circuit and architectural levels. In particular, devices whose properties can be tuned through additional terminals enable a fine and dynamic control of device threshold. They also enable designers to realize logic gates and to implement power-related techniques in a compact way unreachable to standard technologies. These innovations reduce power consumption at the gate level and unlock new means of actuation in architectural solutions like adaptive voltage and frequency scaling.

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Section: Power Management Techniques For Mpsocsmentioning

confidence: 99%

A Survey on Low-Power Techniques with Emerging Technologies

Gaillardon

Beigné

Lesecq

et al. 2015

J. Emerg. Technol. Comput. Syst.

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“…This threshold, commonly known as energy-efficient frequency (or, critical speed), can be computed by standard methods [8,17].…”

Section: Power/energy Modelmentioning

confidence: 99%

“…With DVFS, the processor frequency and supply voltage are lowered at run-time to reduce energy consumption. Since the tasks take longer to execute at lower frequencies, several research studies investigated the problem of guaranteeing the timing constraints in embedded applications while saving energy through DVFS [2,5,8,11,17].…”

Section: Introductionmentioning

confidence: 99%

Generalized reliability-oriented energy management for real-time embedded applications

Zhao

Aydın

Zhu

2011

Proceedings of the 48th Design Automation Conference

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DVFS remains an important energy management technique for embedded systems. However, its negative impact on transient fault rates has been recently shown. In this paper, we propose the Generalized Shared Recovery (GSHR) technique to optimally use the DVFS technique in order to achieve a given reliability goal for real-time embedded applications. Our technique determines the optimal number of recoveries to deploy as well as task-level processing frequencies to minimize the energy consumption while achieving the reliability goal and meeting the timing constraints. The recoveries may be shared among tasks, improving the prospects of DVFS compared to existing reliability-aware power management frameworks. The experimental evaluation points to the close-to-optimal energy savings of our proposed technique.

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“…Some of the widely adopted techniques to achieve energy efficiency in scheduling include optimization of idle time, preemptions and cache impacts in the schedule [8] [15 -20]. The idle time optimization can be achieved with the help of dynamic voltage and frequency scaling (DVFS) for the processors supporting multiple voltage and frequency levels [15] [21 -23]. DVFS results in increasing execution time thus increasing preemptions and cache impacts [14].…”

mentioning

confidence: 99%

LLFRP: An Energy Efficient Variant of LLF with Reduced Pre-emptions for Real – Time Systems

Baid¹,

Prashanth

Raveendran

2014

GSTF J Comput

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Abstract-Energy efficiency without performance degradation is a challenge in battery operated real-time systems. One way to achieve this is by optimizing scheduling parameters like preemptions and cache activities. In this work, we present an energy efficient variant of Least Laxity First scheduler -Least Laxity First with Reduced Preemptions -that reduces the number of preemptions in a schedule. We prove that our scheduler offers the same feasibility as LLF. We present extensive analysis through experimental results to show that our variant significantly reduces the number of preemptions. Our results also show that the number of preemptions in the schedule output by this algorithm is close to the minimum possible number. Our analysis addresses the following metrics: preemptions, cache impacts, decision points, response time, response time jitter, latency, time complexity and energy consumption. In this work the proposed algorithm is compared with dynamic priority scheduling algorithms like RM, EDF, nonstrict LLF and strict-LLF. The result shows that the proposed algorithm offers 4.25% of energy saving in comparison with EDF, RM and non-strict LLF and it offers 7% energy saving in comparison with strict-LLF. The result also shows that the proposed algorithm increases the scheduling utilization by 4% in comparison with EDF, RM and non-strict LLF and it increases scheduling utilization by 6% in comparison with strict-LLF.

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System-level energy-efficient dynamic task scheduling

Cited by 69 publications

References 13 publications

A Survey on Low-Power Techniques with Emerging Technologies

A Survey on Low-Power Techniques with Emerging Technologies

Generalized reliability-oriented energy management for real-time embedded applications

LLFRP: An Energy Efficient Variant of LLF with Reduced Pre-emptions for Real – Time Systems

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