System-Level Design and Virtual Prototyping of a Telecommunication Application on a NUMA Platform

Abstract

The use of model-driven approaches for embedded system design has become a common practice. Among these model-driven approaches, only a few of them include the generation of a fullsystem simulation comprising operating system, code generation for tasks and hardware simulation models. Even less common is the extension to massively parallel, NoC based designs, such as required for high performance streaming applications where dozens of tasks are replicated onto identical general purpose processor cores of a Multi-processor System-on-chip (MP-SoC). We present the extension of a system-level tool to handle clustered Network-on-Chip (NoC) with virtual prototyping platforms. On the one hand, the automatic generation of the virtual prototype becomes more complex as topcell, address mapping and linker script have to be adapted. On the other hand, the exploration of the design space is particularly important for this class of applications, as performance may strongly be impacted by Non Uniform Memory Access (NUMA).

High-level modeling of communication-centric applications: Extensions to a system-level design and virtual prototyping tool

“…However, while a simulation on partitioning level is performed in a matter of seconds, the full-system simulation of the platform takes several hours (execution of the bootstrap and transmitting 10k packets of random priorities) even with a relatively small number of tasks. As shown in [2] where we focused on throughput, in the 20 million simulation cycles after bootstrap 3.5 * 10 −5 bytes are transferred per simulation cycle. With the cycle-bit accurate models of the I/O engines, simulation time remains practically unchanged: the number of transfers on the VCI interconnect dominates the time for cycle accurate simulation of I/O engines.…”

“…TTool, up to the work described in [2], did not provide support for modeling NUMA virtual platforms. A NUMA architecture typically addresses at least two computing domains.…”

“…The corresponding cycle-accurate SystemC hardware components have now been added to our virtual prototyping environment. In the Deployment Diagrams in [2], we used the existing MWMRCoporoc blocks to indicate an interface to the I/O block. The block as such was visible in the block diagram, and was software.…”

“…Our previous work [1,2] enabled the multi-level modeling of high throughput task-farm applications, by providing a formal basis for non-deterministic channel accesses and extended TTool to model NUMA architectures and generate NUMA virtual prototypes. However, while streaming applications strongly rely on I/O elements, it was not possible to model these elements.…”