FFTs are important modules in embedded telecom systems, many of which require low-power real-time implementations. This paper describes a technique for aggressively localizing data accesses in a (inverse) Fast Fourier 'hansformation at the source code level. The global I/O functionality is not modified and neither is the bittrue arithmetic behavior. 'Qpically 20 to 50% of the background memory accesses can be saved. A heavily parametrizable solution will be proposed which leads to a family of power optimized algorithm codes. Moreover, efficient coding details for specific instances are shown.
CONTEXT AND MOTIVATIONA hardware or even an embedded software realization has to be power efficient in order to reduce the size of the chip packages (where it is embedded) or the battery (if used in a mobile application) 141. The power cost in data-dominated application is heavily dominated by storage and transfers of complex data types. This has been demonstrated both for custom [18] and for programmable instruction-set processors 1141. The reason is that an off-chip data transfer consumes about 33 times more power than a typical 16-bit arithmetic operation like an addition.In addition experiments indicate that the number of primitive arithmetic operations is typically only a few times higher than the number of data transfer operations to big signals. Combined this gives at least a factor of 10 in difference for the power consumption of data transfers in an unoptimized description compared to (equally unoptimized) arithmetic operations. Similar observations can be made for the FIT function in both software and especially hardware implementations. Hence the global data transfer and storage overhead should be reduced first in the system design trajectory.To perform the high performance data dominated function, fast busses and large memories with high access rates ftodto data-path are needed. Efficient implementation of the complex algorithms requires a global analysis of the critical sections and code transformations to eliminate or at least alleviate the impact of these bottlenecks.Many systematic software-oriented memory management approaches exist in literature but they do not focus on the combination of performance and overall power, 'partly sponsored by the Esprit ESDLPD project 25518 : DAB-LP 0-7803-5650-0/99/$10.00 0 1999 IEEE 63 5