“…The key feature of reversible logic gates is the establishment of a one-to-one mapping between inputs and outputs, enabling the retrieval of outputs from inputs and vice versa (Bennett, 1973). Several reversible gates exist, including the reversible NOT gate (Misra et al, 2017), Feynman gate (FG) (Feynman, 1985), Peres gate (PG) (Peres, 1985), double Peres gate (DPG) (Tara & Babu, 2016), Fredkin gate, Toffoli gate (Fredkin & Toffoli, 1982), controlled V gate and controlled V+ gate (Maity, 2022), and more. In the "controlled-V gate, when input A is '0', the output Q is equal to B. Conversely, if A equals '1', the output Q becomes V(B), where, V is defined as the unitary operation V = i+1 2 ( 1 −i −i 1 ) is applied to the input B. V+ is the Hermitian of V".…”