2023
DOI: 10.1109/tvlsi.2023.3287631
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Synthesis of Approximate Parallel-Prefix Adders

Apostolos Stefanidis,
Ioanna Zoumpoulidou,
Dionysios Filippas
et al.
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“…In the past few years, the design of low-latency approximate adders has received a significant amount of attention from the approximate computing community [17,[29][30][31][32][33][34], to improve the performance, area and power efficiency of error-resilient applications. A dominant subset of these adders, which includes segmented and carry select adders (Figure 1 and Figure 2, respectively), is based on the idea that, for most of the input combinations, the longest carry propagation chain is less than the complete length (N) of the adder [28].…”
Section: Introductionmentioning
confidence: 99%
“…In the past few years, the design of low-latency approximate adders has received a significant amount of attention from the approximate computing community [17,[29][30][31][32][33][34], to improve the performance, area and power efficiency of error-resilient applications. A dominant subset of these adders, which includes segmented and carry select adders (Figure 1 and Figure 2, respectively), is based on the idea that, for most of the input combinations, the longest carry propagation chain is less than the complete length (N) of the adder [28].…”
Section: Introductionmentioning
confidence: 99%