Synchronization Using Remote-Scope Promotion

Orr, Marc; Che, Shuai; Yilmazer, Ayse; Beckmann, Bradford M.; Hill, Mark D.; Wood, David А.

doi:10.1145/2694344.2694350

Cited by 29 publications

(21 citation statements)

References 23 publications

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“…Other works [3,33,46] focus on reducing on-chip intra-GPU communication and coherence traffic. These works rely heavily on software assistance to reduce coherence complexity, which requires considerable programmer and compiler involvement (e.g., custom APIs, custom programming models), preventing their applicability to all types of applications.…”

Section: Related Workmentioning

confidence: 99%

LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory

Boroumand

Ghose

Patel

et al. 2017

IEEE Comput. Arch. Lett.

131

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Processing-in-memory (PIM) architectures cannot use traditional approaches to cache coherence due to the high off-chip traffic consumed by coherence messages. We propose LazyPIM, a new hardware cache coherence mechanism designed specifically for PIM. LazyPIM uses a combination of speculative cache coherence and compressed coherence signatures to greatly reduce the overhead of keeping PIM coherent with the processor. We find that LazyPIM improves average performance across a range of PIM applications by 49.1% over the best prior approach, coming within 5.5% of an ideal PIM mechanism.

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Section: Related Workmentioning

confidence: 99%

LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory

Boroumand

Ghose

Patel

et al. 2017

IEEE Comput. Arch. Lett.

131

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“…Happens-before is partitioned into global and local versions: global happens-before (ghb) contains global synchronises-with and sequenced-before edges between events on global memory, 29 and local happens-before (lhb) is analogous. 30 See Example 5 for a discussion of the repercussions of this definition of happens-before. Visibility is also split into global (gvis) and local (lvis) versions.…”

Section: Opencl Axiomsmentioning

confidence: 99%

“…The only published compilation scheme of the OpenCL 2.0 memory model of which we are aware is that published by AMD [30] and later formalised by Wickerson et al [41]. The scheme compiles the release/acquire fragment of OpenCL atomics, and its soundness has been verified against an operational model of an AMD GPU [41].…”

Section: Implementability Of the New Sc Axiommentioning

confidence: 99%

“…AMD and Intel have recently released OpenCL 2.0-compliant implementations [4,19]. We are aware only of one implementation of the OpenCL memory model that has been formalised: namely, a compilation scheme from OpenCL (extended with a feature called remote-scope promotion [30]) to a model of next-generation AMD GPUs [41]. Alglave et al present an experimentally-validated axiomatic model of an Nvidia GPU [3], which could provide another compilation target for our OpenCL memory model.…”

Section: Related Workmentioning

confidence: 99%

“… [23 (47/16-26)]26 [23 (51/1-9)]27 [23 (51/32-33)]28 [23 (54/13-16)]29 [23 (49/3-7)]30 [23 (49/8-11)]31 [23 (49/21-26)]32 This terminology is due to Hower et al[18].…”

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confidence: 99%

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Overhauling SC atomics in C11 and OpenCL

Batty

Donaldson

Wickerson

2016

Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages

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Despite the conceptual simplicity of sequential consistency (SC), the semantics of SC atomic operations and fences in the C11 and OpenCL memory models is subtle, leading to convoluted prose descriptions that translate to complex axiomatic formalisations. We conduct an overhaul of SC atomics in C11, reducing the associated axioms in both number and complexity. A consequence of our simplification is that the SC operations in an execution no longer need to be totally ordered. This relaxation enables, for the first time, efficient and exhaustive simulation of litmus tests that use SC atomics. We extend our improved C11 model to obtain the first rigorous memory model formalisation for OpenCL (which extends C11 with support for heterogeneous many-core programming). In the OpenCL setting, we refine the SC axioms still further to give a sensible semantics to SC operations that employ a 'memory scope' to restrict their visibility to specific threads. Our overhaul requires slight strengthenings of both the C11 and the OpenCL memory models, causing some behaviours to become disallowed. We argue that these strengthenings are natural, and that all of the formalised C11 and OpenCL compilation schemes of which we are aware (Power and x86 CPUs for C11, AMD GPUs for OpenCL) remain valid in our revised models. Using the HERD memory model simulator, we show that our overhaul leads to an exponential improvement in simulation time for C11 litmus tests compared with the original model, making exhaustive simulation competitive, time-wise, with the non-exhaustive CDSChecker tool.[Copyright notice will appear here once 'preprint' option is removed.] 1 Threads in OpenCL are also called work-items. 2015/11/4 33 [23 (49/29-33)] 34 [23 (58/24-27)] 35 [23 (51/15-17)] 36 [23 (51/18-20)] 37 [23 (49/12-13)]

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sRSP: An efficient and scalable implementation of remote scope promotion

Yilmazer

2021

Concurrency and Computation

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GPUs only support simple coherence operations. For data integrity, heavyweight synchronization operations must be explicitly used. Scoped synchronization Hower et al. (2014) and Gaster et al. (2015) has been introduced to facilitate low overhead communication, when the communication is local across a subset of threads. Scoped synchronization can be used if the sharing is static. However, it is not possible to avoid using heavyweight global-scoped synchronization when the sharing is dynamic. Asymmetric sharing is one of the dynamic sharing patterns where a shared data is frequently accessed by a single agent while being rarely accessed by remote agents. It requires using global-scoped synchronization to encompass all possible synchronization agents on a GPU device without any special support. Remote scope promotion (RSP) Orr et al. (2015) allows use of lightweight local-scoped synchronization for frequent accesses and defers the most synchronization overhead to the rare remote accesses. We propose sRSP which is an efficient and scalable implementation of RSP semantics. sRSP tracks local-scoped synchronizations on local caches. When performing remote-scoped synchronization, it applies the costly cache operations selectively.We thoroughly evaluate our work and show that it reduces remote synchronization overhead significantly and scales better. On the average, it improves the performance around 25% for a GPU device with 64 compute units.

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Synchronization Using Remote-Scope Promotion

Cited by 29 publications

References 23 publications

LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory

LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory

Overhauling SC atomics in C11 and OpenCL

sRSP: An efficient and scalable implementation of remote scope promotion

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