Symmetric and asymmetric multilevel inverter topologies with reduced switching devices

Babaei, Ebrahim; Farhadi‐Kangarlu, Mohammad; Mazgar, Farshid Najaty

doi:10.1016/j.epsr.2011.12.013

Cited by 155 publications

(82 citation statements)

References 21 publications

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“…Several new schemes of multilevel converters with minimum number of switches and gate drivers have been presented [10][11][12][13] . However, these topologies require many separated dc sources.…”

Section: Introductionmentioning

confidence: 99%

A new scheme of multilevel inverter with charge balancing control and minimum number of switches

Barzegarkhoo

Karami

Abrishamifar

et al. 2014

2014 22nd Iranian Conference on Electrical Engineering (ICEE)

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A new scheme of symmetric multilevel inverter is proposed that could reduce the switch numbers, conduction losses, and costs. A novel switching algorithm based on selective harmonic elimination PWM scheme has been introduced to control the voltage balancing of the dc link capacitors. In this way, all of the voltage levels can be created in the inverter output with only one dc power supply. The visibility and effectiveness of the proposed strategy has been verified through various simulation results.

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Section: Introductionmentioning

confidence: 99%

A new scheme of multilevel inverter with charge balancing control and minimum number of switches

Barzegarkhoo

Karami

Abrishamifar

et al. 2014

2014 22nd Iranian Conference on Electrical Engineering (ICEE)

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“…The inverter topology based on the multilevel dc link topology and a full bridge inverter configuration has been presented in [23]. However, the dc-link voltage topology becomes inefficient if the symmetrical cascaded method is applied, when the input dc supplies are equal to each other [22,24]. A new family of ACHB inverter topology has been presented in [25], where a higher number of voltage levels is possible without using the full bridge inverter [24].…”

Section: Introductionmentioning

confidence: 99%

“…Actually, the multilevel dc-link voltage can be generated using cascaded NPC or FC topologies [22]. The multilevel dc link voltage is supplied to a full bridge inverter and the full bridge inverter generates the bipolar AC voltage.…”

Section: Introductionmentioning

confidence: 99%

Three-phase multilevel inverter with high value of resolution per switch employing a space vector modulation control scheme

Hasan¹,

Mekhilef²,

Messikh³

et al. 2016

Turk J Elec Eng & Comp Sci

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Abstract:A special cascaded configuration of asymmetric multilevel inverter is presented in this paper. This configuration cancels the redundancy of output voltage steps and maximizes the number of levels in the output voltage. This structure is built by using series connected stages, which minimize the number of semiconductor switches, gate drive arrangements, occupying area, and cost. It is a modular type inverter model and the number of voltage levels can be increased by adding new stages without changing the previous connection. Space vector modulation has been applied as the control strategy. A prototype of the proposed inverter topology has been built in the laboratory. The attached hardware results indicate the accuracy of the proposed model, which include the topology as well as the control technique.

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“…One of the most important features several topologies with various control techniques have been presented for Simulated multilevel inverters [6]- [9]. In [3] and [10]- [14], different symmetric Simulated multilevel inverters have been presented. It is important determining the cost of the inverter.…”

Section: Introductionmentioning

confidence: 99%

A novel simulated multilevel inverter topolo-gy with minimal switches

Anand¹,

Balaji²

2017

IJET

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In this project, an advanced design of simulated multilevel inverters is proposed, which helps to boost the number of output voltage levels and decrease the number of power switches, driver circuits, and the maximum charge of the inverter. It is significant to note down advanced design, the unidirectional power switches are used. Results in decreased complexity and economical. The comparison is done with the conventional topologies and confirmed by simulation outcome. The planned design by using the new technique in produce all voltage levels for a stage inverter which its performance and functional accuracy is confirmed by simulation and experimental results.

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Symmetric and asymmetric multilevel inverter topologies with reduced switching devices

Cited by 155 publications

References 21 publications

A new scheme of multilevel inverter with charge balancing control and minimum number of switches

A new scheme of multilevel inverter with charge balancing control and minimum number of switches

Three-phase multilevel inverter with high value of resolution per switch employing a space vector modulation control scheme

A novel simulated multilevel inverter topolo-gy with minimal switches

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