Symbolic array dataflow analysis for array privatization and program parallelization

Abstract

Array dataow information plays an important role for successful automatic parallelization of Fortran programs. This paper proposes a pow erful symbolic array dataow analysis to support arra ypriv atizationand loop parallelization for programs with arbitrary control ow graphs and acyclic call graphs. Our scheme summarizes arra y access information using guarded array regions and propagates such regions over a Hierarchical Supergraph HSG. The use of guards allo wsus to use the information in IF conditions to sharpen the arra y datao w analysis and thereby to handle dicult cases which elude other existing techniques. The guarded array regions retain the simplicit y of set operations for regular arra yregions in common cases, and they enhance regular arra yregions in complicated cases b y using guards to handle complex symbolic expressions

Automatic Parallelization Using the Value Evolution Graph

“…Recurrences with closed forms are those in which the i-th term can be written as an algebraic formula of i. References to arrays using recurrences with closed forms can be meaningfully expressed using systems of inequations [25,20,13] or triplet-based notations [14,9] containing the closed form terms and other symbolic values such as loop bounds. When a recurrence that has no closed form is used to index an array, the corresponding memory reference set cannot be summarized using an algebraic formula.…”

Automatic parallelization of recursive procedures

“…However, the two approaches differ in the following ways. First, our work uses different symbolic analysis techniques that extend those employed in production compilers: we use novel extensions to (and a combination of) guarded array region analysis [8], symbolic range propagation [1], and generalizations of induction variable analysis [6], while Rugina and Rinard use abstract interpretation techniques and correlation analysis of variables, to obtain precise enough array access information to support detection of parallelism. We believe that their analysis [25] would fail to detect parallelism in our motivating example, described in Section 3.…”

“…For arrays, this information is represented using a list of Guarded Array Regions (GARs) [8]. A GAR is a tuple hG; Di, where D is a bounded Regular Section Descriptor (RSD) [13] for the accessed array section, and G is a guard that specifies the condition under which D is accessed [8].…”

“…A GAR is a tuple hG; Di, where D is a bounded Regular Section Descriptor (RSD) [13] for the accessed array section, and G is a guard that specifies the condition under which D is accessed [8].…”

On the removal of anti and output dependences

“…Proposed methods include "array d a t a flow analysis" [5, 81, "array privatization" [7], "variable expansion" [3], "variable renaming" [9] and "node splitting" [9]. See the survey papers of Banerjee, Eigenmann, Nicolau and Padua [2] and Bacon, Graham and Sharp [1], as well as the books of Wolfe [15] and Zima [16], for further references.…”