Survey of indexing schemes for information retrieval on flash memory based wireless sensor networks

Abstract

The advancement in wireless technologies is playing greatest role in providing information services to users anywhere and any time by using various devices in a ubiquitous environment. Research works concerning the techniques used to effectively store and retrieve information from wireless sensor networks (WSNs) is immature.In this paper, we survey and describe mechanisms for rendering effective information retrieval services in a ubiquitous sensor network environment as efficient information storage and retrieval mechanisms are needed for the resource constrained wireless sensor network. This paper describes flash memory based indexing scheme implementations for information storage and retrieval in WSNs. Finally, we recommend future research direction on indexing scheme for information storage and retrieval in flash memory based WSNs.

Formal Verification of Hardware Components in Critical Systems

“…e function returns the second argument m if the first argument is O; otherwise, it returns Succ (Add n′ m). A lemma Add_N_O, where Add n O � n holds for any value of n, is stated and proven in Listing 1 (lines [11][12][13][14][15][16][17][18]. e proof of this lemma has been carried out by applying induction on the construction of the first argument n. While carrying out the proof, the Coq tool was interactively guided by giving proof commands called tactics (lines 13-17).…”

“…e BCD adder on the left is with look-ahead carry generator and the one on the right is without look-ahead carry generator [29]. calculate the four sum bits in terms of the look-ahead carry bits C2-C5 and initial carry e. Finally, the 4-bit binary parallel adder with look-ahead carry generator is defined as a function FA4bitLA (lines [17][18][19][20]. As in BCDadder, two instances of binary parallel adder FA4bitLA are combined together with the additional circuitry for output carry to form a BCD adder.…”

“…As the security and reliability of UAVs depend upon the security and reliability of individual components, their correctness must be ensured in the design phase. In addition to UAVs, the formal framework presented in this paper is equally applicable to any other computer system such as sensor networks [15][16][17] and hardware components, such as flash memory, of such systems [18]. In this paper, we address the formal specification and verification of hardware (logic) components, such as memory units and adders, designed at the logic gates level using Boolean algebra.…”