2023
DOI: 10.1016/j.carbon.2022.12.055
|View full text |Cite
|
Sign up to set email alerts
|

Surface tension traction transfer method for wafer-scale device grade graphene film

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4

Citation Types

0
4
0

Year Published

2023
2023
2024
2024

Publication Types

Select...
2
1

Relationship

0
3

Authors

Journals

citations
Cited by 3 publications
(4 citation statements)
references
References 39 publications
0
4
0
Order By: Relevance
“…[ 33,34 ] During the transfer procedure, loss of substrate material and the introduction of defects, wrinkles, cracks, and contaminations are unavoidable, resulting in a significant decline in the performance of graphene‐based nanoscale electronic devices. [ 35–39 ] To avoid these issues during layer transfer, research efforts on promoting transfer‐free approaches for the direct synthesis of layer‐tunable graphene on device‐bound substrates become increasingly important and urgent. [ 40 ]…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…[ 33,34 ] During the transfer procedure, loss of substrate material and the introduction of defects, wrinkles, cracks, and contaminations are unavoidable, resulting in a significant decline in the performance of graphene‐based nanoscale electronic devices. [ 35–39 ] To avoid these issues during layer transfer, research efforts on promoting transfer‐free approaches for the direct synthesis of layer‐tunable graphene on device‐bound substrates become increasingly important and urgent. [ 40 ]…”
Section: Introductionmentioning
confidence: 99%
“…[33,34] During the transfer procedure, loss of substrate material and the introduction of defects, wrinkles, cracks, and contaminations are unavoidable, resulting in a significant decline in the performance of graphene-based nanoscale electronic devices. [35][36][37][38][39] To avoid these issues during layer transfer, research efforts on promoting transfer-free approaches for the direct synthesis of layer-tunable graphene on device-bound substrates become increasingly important and urgent. [40] In this work, we use a reverse-order Janus substrate (Cu-coated Ni on an arbitrary substrate) instead of the Ni-coated Cu in our previous ion implantation work [32] to achieve both layer-tunability and transfer-free characteristics.…”
Section: Introductionmentioning
confidence: 99%
“… 9 Among them, graphene has attracted more and more researchers’ attention because of its excellent optical and electrical properties 10 15 The shielding effectiveness (SE) of single-layer graphene in the 2.2 to 7 GHz frequency band is 2.27 dB, 16 which is 7 times larger than the same thickness of gold film. The SE of the single polyetherimide (PEI)/reduced graphene oxide (RGO) film is 3.09 dB, and the SE of the double PEI/RGO film is 6.37 dB 17 .…”
Section: Introductionmentioning
confidence: 99%
“…During the post-implantation thermal annealing, the top Cu layer behaves like a "C diffusion barrier" to gradually inward diffuse into the bottom Ni layer (i.e., Cu atoms "top-down diffusion" and Ni "bottom-up diffusion"). The poor solubility of C in Cu (<0.001 at.%) [30] facilitates the implanted C ions (initially located in the Ni layer) to be ejected towards the Cu/Ni interfacial front and finally converted into graphene on the substrate promoted through the catalysis impact of the Cu-Ni alloy. [31][32][33] Removing the Cu-Ni alloy layer leaves behind the as-synthesized graphene on the substrate that was initially used to deposit the Ni film.…”
Section: Introductionmentioning
confidence: 99%