2016
DOI: 10.1109/ted.2016.2554149
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Surface State Engineering of Metal/MoS2Contacts Using Sulfur Treatment for Reduced Contact Resistance and Variability

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Cited by 47 publications
(42 citation statements)
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“…All electrical measurements reported in this work (except temperature‐dependent measurements) were made under ambient conditions. The “control FETs” (samples without vacancy engineering) demonstrated clear n‐type behavior, as commonly reported, with I on / I off ≈ 10 5 (Figure b). The n‐type behavior observed in MoS 2 despite use of high‐work function metal contacts is due to Fermi level pinning near the conduction band, as explored in our previous work .…”
Section: Resultssupporting
confidence: 78%
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“…All electrical measurements reported in this work (except temperature‐dependent measurements) were made under ambient conditions. The “control FETs” (samples without vacancy engineering) demonstrated clear n‐type behavior, as commonly reported, with I on / I off ≈ 10 5 (Figure b). The n‐type behavior observed in MoS 2 despite use of high‐work function metal contacts is due to Fermi level pinning near the conduction band, as explored in our previous work .…”
Section: Resultssupporting
confidence: 78%
“…The “control FETs” (samples without vacancy engineering) demonstrated clear n‐type behavior, as commonly reported, with I on / I off ≈ 10 5 (Figure b). The n‐type behavior observed in MoS 2 despite use of high‐work function metal contacts is due to Fermi level pinning near the conduction band, as explored in our previous work . By contrast, the samples with vacancy engineering demonstrated a complete flip in carrier polarity, with a significant hole current (Figure c).…”
Section: Resultssupporting
confidence: 78%
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“…Forming gas annealing could be another effective way to passivate Dit and enhance the MoS2 device performance (due to lowering of the SS and increase in the µFE) as shown by both Bolshakov et al [300,301] and Young et al [302]. [303]. The sulfur-treated devices showed consistent Ohmic behavior with good current saturation, reduced SBHs and R C as opposed to untreated reference samples that showed variable contact behavior (ranging from Schottky to Ohmic) with poor current saturation.…”
Section: Engineering Structural Defects Interface Traps and Surface mentioning
confidence: 89%
“…2(b), I D -V D indicates a non-linear behavior preanneal and more linear behavior post-anneal, suggesting that annealing also has a beneficial effect on the contacts, not just the dielectric, potentially removing the need for sulfur passivation treatments. [24][25][26] It is noted that with back-gate devices, proper C OX extraction from C-V measurements is nearly impossible due to the high capacitance resulting from the large area of the source/drain pads that dwarf the MoS 2 gate channel capacitance, nor would it be appropriate to extract D it using the subthreshold slope expression due to the uncertainty in C OX and C bulk. 19,27 With parameters such as the field effect mobility (l FE ) reliant on C OX for proper extraction, the proper device evaluation of the back-gate FET is limited, especially since its applicability to current CMOS technology is essentially non-existent.…”
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confidence: 99%