Surface passivation and carrier selectivity of the thermal-atomic-layer-deposited TiO₂ on crystalline silicon

Abstract

Here, we demonstrate the use of an ultrathin TiO2 film as a passivating carrier-selective contact for silicon photovoltaics. The effective lifetime, surface recombination velocity, and diode quality dependence on TiO2 deposition temperature with and without a thin tunneling oxide interlayer (SiO2 or Al2O3) on p-type crystalline silicon (c-Si) are reported. 5-, 10-, and 20-nm-thick TiO2 films were deposited by thermal atomic layer deposition (ALD) in the temperature range of 80–300 °C using titanium tetrachloride (TiCl4) and water. TiO2 thin-film passivation layers alone result in a lower effective carrier lifetime compared with that with an interlayer. However, SiO2 and Al2O3 interlayers enhance the TiO2 passivation of c-Si surfaces. Further annealing at 200 °C in N2 gas enhances the surface passivation quality of TiO2 tremendously. From these findings, design principles for TiO2–Si heterojunction with optimized photovoltage, interface quality, and electron extraction to maximize the photovoltage of TiO2–Si heterojunction photovoltaic cells are formulated. Diode behaviour was analysed with the help of experimental, analytical, and simulation methods. It is predicted that TiO2 with a high carrier concentration is a preferable candidate for high-performance solar cells. The possible reasons for performance degradation in those devices with and without interlayers are also discussed.

Local Structure of High Performance TiOx Electron‐Selective Contact Revealed by Electron Energy Loss Spectroscopy

“…Among them, ALD‐TiO x thin layers have been intensely investigated since it functions as a good passivation layer for c‐Si surface due to the low deposition damage to c‐Si surface and the ability to fabricate sub 5 nm thick films. Indeed, it is well known that the good passivation performance is provided by the ALD‐TiO x /c‐Si heterocontact after postannealing at about 300 °C . We reported that the origin of improved passivation by postannealing is effusion of hydrogen and hydrogenated molecules from H‐terminated c‐Si and subsequent formation of a silicon oxide (SiO x ) layer at the TiO x /c‐Si interface .…”

Evidence for Chemicals Intermingling at Silicon/Titanium Oxide (TiOx) Interface and Existence of Multiple Bonding States in Monolithic TiOx

“…Thus, employing TiO x as an electron selective contact, they also achieved good surface passivation and demonstrated the development of improved c‐Si solar cells with efficiency as high as ≈21.6%, and with a potential of achieving 23.7% efficiency . Thomson and McIntosh and Plakhotnyuk et al have also observed good surface passivation and carrier selectivity with TiO 2 on c‐Si. While interesting functional characteristics have been realized with TiO x dielectric, the fundamental nature of the c‐Si/TiO x interface and the structural behavior of TiO x still remain unclear, thus limiting both scientific and technological development.…”

“…In recent years, the search continued to find novel dielectrics with multifunctional capabilities in order to further alleviate the surface recombination, enhance the efficiency, and reduce the cost of c‐Si solar cells. Titanium oxide (TiO x ) is one such emerging dielectric for c‐Si solar cells due to its excellent optical properties, remarkable carrier selectivity, and excellent surface passivation features . Liao et al and Gad et al have previously demonstrated that atomic layer deposited (ALD) TiO x is able to provide excellent surface passivation on c‐Si surfaces, in addition to its ideal optical properties (refractive index of ≈2.4 at a wavelength of 632.8 nm and a relatively low absorption in the visible wavelength range) to be used as an antireflection coating (ARC) for encapsulated silicon wafer solar cells.…”

TaS2 Back Contact Improving Oxide-Converted Cu2BaSnS4 Solar Cells

“…Two explanations may be plausible here: (i) photogenerated holes near the bottom of the CBTS film are trapped in the Cu 4 BaS 3 /BaSn 2 S 3 phases and can only escape under a high electric field, and (ii) there is a barrier at the Ti­(O,N)/PolySi interface or at the Ti­(O,N)/CBTS interface. We note that the pure oxide TiO 2 is typically used as an electron contact, even for CBTS devices, , so the Ti­(O,N)/CBTS hole contact may be the most likely location of a barrier to carrier transport.…”