Surface code error correction on a defective lattice

Abstract

The yield of physical qubits fabricated in the laboratory is much lower than that of classical transistors in production semiconductor fabrication. Actual implementations of quantum computers will be susceptible to loss in the form of physically faulty qubits. Though these physical faults must negatively affect the computation, we can deal with them by adapting error-correction schemes. In this paper we have simulated statically placed single-fault lattices and lattices with randomly placed faults at functional qubit yields of 80%, 90%, and 95%, showing practical performance of a defective surface code by employing actual circuit constructions and realistic errors on every gate, including identity gates. We extend Stace et alʼs superplaquettes solution against dynamic losses for the surface code to handle static losses such as physically faulty qubits [1]. The single-fault analysis shows that a static loss at the periphery of the lattice has less negative effect than a static loss at the center. The randomly faulty analysis shows that 95% yield is good enough to build a large-scale quantum computer. The local gate error rate threshold is~0.3%, and a code distance of seven suppresses the residual error rate below the original error rate at = p 0.1%. 90% yield is also good enough when we discard badly fabricated quantum computation chips, while 80% yield does not show enough error suppression even when discarding 90% of the chips. We evaluated several metrics for predicting chip performance, and found that the average of the product of the number of data qubits and the cycle time of a stabilizer measurement of stabilizers gave the strongest correlation with logical error rates. Our analysis will help with selecting usable quantum computation chips from among the pool of all fabricated chips.

Fault-tolerance thresholds for the surface code with fabrication errors

“…We believe this will be a more amenable adaptation for some physical systems. Moreover, link fabrication errors were not considered in [27]. Figure 15: Rate at which highest-weight supercheck operators occur for link fabrication error rate p link = 10%.…”

“…aq bq cq In the context of fabrication errors, the same approach can be used for data qubit fabrication errors. However, measuring a supercheck operator directly is often nontrivial task as it may require interaction between arbitrarily separated qubits or involve many SWAP gates, as was shown in [27], which can affect measurement of nearby stabilizer generators. Our approach for handling fabrication errors uses the same supercheck operator approach, but makes use of the concept of gauge qubits.…”

“…Two recent approaches have been proposed to mitigate the effect of fabrication errors; the first is to construct a robust topology that tolerates sparse fabrication errors using additional local graph encoding [26], and the second is to use primitive SWAP gates in the construction of the syndrome read-out circuit [27]. Our approach differs from these by keeping the construction of the surface code unaltered without attempting to mitigate the missing components or performing an adaptive procedure.…”

Logical Qubit in a Linear Array of Semiconductor Quantum Dots

“…Beyond this scale, the LNN logical qubit could be a building block for a larger system. Schemes to handle imperfect qubit yield or qubit loss have been studied in error-correcting codes [156,157], qubit device designs [158][159][160][161][162][163], and quantum networks [164][165][166]. Similarly, ion-trap proposals have studied how to effectively combine linear trapping regions with junctions to overcome the limitations of a strictly linear trap [4,9,[167][168][169][170].…”

“…[171], enabling enough connectivity to route information around defective dots and tolerate imperfect yield. For example, linear segments of dots could be arranged in a grid pattern [172], enabling 2D connectivity at this scale for avoiding defects or implementing codes that are tolerant of defects [156,157]. However, developing such a scheme is outside our present scope.…”