Surface cleaning process for plasma-etched SiC wafer

Zhao, Lihuan; Shang, Haiping; Wang, Dahai; Liu, Yang; Xue, Ming; Yu, Jiahan; Wang, Weibing

doi:10.1007/s00339-020-03774-1

Cited by 6 publications

(6 citation statements)

References 27 publications

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“…However, this is very detrimental to the room temperature bonding process, since large roughness and particle containment could cause unbonded areas. So here, as shown in Figure 2 a, we used SiO 2 and Ni as the etching mask, according to our previous experiment method [ 28 ], which has optimized the roughness of the surface outside the cavity, that is, the bonding area, to less than 0.2 nm. First, a thickness of 100 nm SiO 2 and 500 nm Ni were deposited on a SiC wafer.…”

Section: Methodsmentioning

confidence: 99%

“…Finally, SiO 2 and Ni were corroded by the wet method. Detailed mask removal steps and cleaning methods can be seen in our previous study [ 28 ]. After the cavity wafer was obtained, an Ar-FAB beam was utilized in a supervacuum to remove contamination and oxide layer adhered on the two SiC surfaces.…”

Section: Methodsmentioning

confidence: 99%

“…In our method, using a SiC-SiC room temperature bonding technology can help effectively avoid the material property mismatch problem and the energy consumption caused by a high temperature bonding process. In previous research, we have successfully reduced the surface roughness of the outer cavity area, namely the bonding area, to less than 0.2 nm, by optimizing the process method of SiC cavity plasma-etching process [28]. The realization of this step optimization process has laid a foundation for the implementation of a SiC-SiC room temperature bonding process.…”

Section: Introductionmentioning

confidence: 99%

“…In previous research, we have successfully reduced the surface roughness of the outer cavity area, namely the bonding area, to less than 0.2 nm, by optimizing the process method of SiC cavity plasma-etching process [ 28 ]. The realization of this step optimization process has laid a foundation for the implementation of a SiC–SiC room temperature bonding process.…”

Section: Introductionmentioning

confidence: 99%

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Fabrication of SiC Sealing Cavity Structure for All-SiC Piezoresistive Pressure Sensor Applications

et al. 2020

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High hardness and corrosion resistance of SiC (silicon carbide) bulk materials have always been a difficult problem in the processing of an all-SiC piezoresistive pressure sensor. In this work, we demonstrated a SiC sealing cavity structure utilizing SiC shallow plasma-etched process (≤20 μm) and SiC–SiC room temperature bonding technology. The SiC bonding interface was closely connected, and its average tensile strength could reach 6.71 MPa. In addition, through a rapid thermal annealing (RTA) experiment of 1 min and 10 mins in N2 atmosphere of 1000 °C, it was found that Si, C and O elements at the bonding interface were diffused, while the width of the intermediate interface layer was narrowed, and the tensile strength could remain stable. This SiC sealing cavity structure has important application value in the realization of an all-SiC piezoresistive pressure sensor.

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Section: Methodsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Fabrication of SiC Sealing Cavity Structure for All-SiC Piezoresistive Pressure Sensor Applications

et al. 2020

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“…Moreover, the contamination and impurities left on SiC surface after the etching process seriously increase the surface roughness and affect the hermeticity performance of the cavity structure. Our team developed a method to provide excellent SiC surface preparation for a subsequent bonding process through ultrasonic cleaning and oxygen plasma bombardment [ 22 ]. The root-mean-square (RMS) surface roughness was confirmed as ~0.0962 nm by atomic force microscopy (AFM).…”

Section: Theory and Experimentsmentioning

confidence: 99%

Hermeticity Analysis on SiC Cavity Structure for All-SiC Piezoresistive Pressure Sensor

Tian

Shang

Zhao

et al. 2021

Sensors

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The hermeticity performance of the cavity structure has an impact on the long-term stability of absolute pressure sensors for high temperature applications. In this paper, a bare silicon carbide (SiC) wafer was bonded to a patterned SiC substrate with shallow grooves based on a room temperature direct bonding process to achieve a sealed cavity structure. Then the hermeticity analysis on the SiC cavity structure was performed. The microstructure observation demonstrates that the SiC wafers are tightly bonded and the cavities remain intact. Moreover, the tensile testing indicates that the tensile strength of bonding interface is ~8.01 MPa. Moreover, the quantitative analysis on the airtightness of cavity structure through leakage detection shows a helium leak rate of ~1.3 × 10−10 Pa⋅m3/s, which satisfies the requirement of the specification in the MIL-STD-883H. The cavity structure can also avoid an undesirable deep etching process and the problem caused by the mismatch of thermal expansion coefficients, which can be potentially further developed into an all-SiC piezoresistive pressure sensor employable for high temperature applications.

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Design, fabrication and test of a bulk SiC MEMS accelerometer

Zhai

Tao

et al. 2022

Microelectronic Engineering

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Surface cleaning process for plasma-etched SiC wafer

Cited by 6 publications

References 27 publications

Fabrication of SiC Sealing Cavity Structure for All-SiC Piezoresistive Pressure Sensor Applications

Fabrication of SiC Sealing Cavity Structure for All-SiC Piezoresistive Pressure Sensor Applications

Hermeticity Analysis on SiC Cavity Structure for All-SiC Piezoresistive Pressure Sensor

Design, fabrication and test of a bulk SiC MEMS accelerometer

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