Superior Implementation of Accelerated QR Decomposition for Ultrasound Imaging

Abstract

In this work, a novel Minimum Variance Distortion less Response (MVDR) beamformer architecture in which the adaptive weight vector is computed based on modified Column wise Givens Rotation (CGR) is presented. As compared to the conventional MVDR beamformer, Quadrature Rotation Decomposition (QRD)-MVDR is suitable for hardware realizations. To improve the real-time performance requirements of the MVDR Beamformer, a parallel pipe-lined CGR based QRD architecture is employed in the adaptive weight computation stage of the MVDR Beamformer. A computationally efficient MVDR beamforming algorithm, which requires to compute only the R matrix in QRD, rather than matrix inverse is used to develop the architecture. The developed architecture generates the adaptive weight vector in 3.9ns, and hence a beam can be formed in 0.25msec time. The designed architecture is implemented using Verilog Register Transfer Level (RTL) coding, and the functional equivalence checking was carried with the Verasonics Vantage-64 Ultrasound Research Platform (URP). The architecture is also ported on Xilinx Kintex-7 FPGA based Emulation set up and validated in real-time, targeting medical ultrasound imaging applications. The developed architecture is compared with the existing architecture implementations. It concludes that the architecture is superior in terms of computational time and can be adapted for ultrafast adaptive beamforming applications.

An Efficient Parallel Architecture for Sub Band Processor in Broad Band MVDR Beamformer for Medical Ultrasound Applications

“…Each channel output was buffered for FFT segment size (1K), overlapped FFT is implemented with an overlap of 128 sample, and hence there was 896 new samples. The same is depicted in article [12] with a superior implementation technique. Time to process 1K samples were considered as the real time requirement of the MVDR Beamformer, and here it is 51.3µsce.…”

“…In this work we have employed Xilinx™ FFT IP Core [12]. The IP Core was configured as Radix-2, 1024 point, pipelined streaming mode, operates at 200MHz.…”

RNS-Based FPGA Accelerators for High-Quality 3D Medical Image Wavelet Processing Using Scaled Filter Coefficients

“…The authors [43] presented the Gabor filter design on the FPGA accelerator for power-efficient and high-performance medical imaging applications. FPGA-based emulation of minimum variance distortionless response beamformer architecture for ultrasound imaging is proposed in [44]. A novel method for the urinary bladder non-invasively volume measuring based on the electrical impedance tomography principles and implemented on FPGA is presented in [25].…”