Superconducting routing platform for large-scale integration of quantum technologies

Abstract

To reach large-scale quantum computing, three-dimensional integration of scalable qubit arrays and their control electronics in multi-chip assemblies is promising. Within these assemblies, the use of superconducting interconnections, as routing layers, offers interesting perspective in terms of (1) thermal management to protect the qubits from control electronics self-heating, (2) passive device performance with significant increase of quality factors and (3) density rise of low and high frequency signals thanks to minimal dispersion. We report on the fabrication, using 200 mm silicon wafer technologies, of a multi-layer routing platform designed for the hybridation of spin qubit and control electronics chips. A routing level couples the qubits and the control circuits through one layer of Al0.995Cu0.005 and superconducting layers of TiN, Nb or NbN, connected between them by W-based vias. Wafer-level parametric tests at 300 K validate the yield of these technologies while low temperature electrical measurements in cryostat are used to extract the superconducting properties of the routing layers. Preliminary low temperature radio-frequency characterizations of superconducting passive elements, embedded in these routing levels, are presented.

Nanoscale direct-write fabrication of superconducting devices for application in quantum technologies

“…• Photolithography has been used for integrating superconducting routing levels on a Si-based interposer with the aim of electrically coupling spin qubit arrays with cryo-CMOS control and read-out circuits [36]. • Electron beam lithography is a very popular fabrication technique in quantum technologies and has been applied to fabricate Josephson persistent-current qubits [37], flux qubits [38], phase qubits [39], etc.…”