2002
DOI: 10.1109/16.998608
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Substrate and epitaxial issues for SiC power devices

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Cited by 14 publications
(3 citation statements)
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“…1) defined N as a total impurity density. They used experimental data for μ RT depending on n e in 4H-SiC epi-layers [1,[5][6][7]18] and in 4H-SiC Lely crystals [10], as well as μ RT depending on N D -N A in 4H-SiC epi-layers [3,8,11] to extract fitting parameters in Eq. 1.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…1) defined N as a total impurity density. They used experimental data for μ RT depending on n e in 4H-SiC epi-layers [1,[5][6][7]18] and in 4H-SiC Lely crystals [10], as well as μ RT depending on N D -N A in 4H-SiC epi-layers [3,8,11] to extract fitting parameters in Eq. 1.…”
Section: Resultsmentioning
confidence: 99%
“…3, the implantation was performed at RT in five steps with individual implantation energies and fluencies. The samples were subjected to post-implantation annealing in argon ambient at temperatures between 1500 and 1700 °C for 30 min resulting in n e ranging from 2.8×10 18 to 4×10 18 cm -3 in different samples. Surface protection by graphite capping layer was employed to prevent surface deterioration [13].…”
Section: Methodsmentioning
confidence: 99%
“…This reduction can be attributed to the dependence of surface charge, interface trapped charges and change of surface potential at higher temperature. In SiC MOSFETs, the overall on-resistance of the transistor is the sum of the MOSFET channel, vertical JFET region, and the drift region [11].…”
Section: Sic Materials Challengesmentioning
confidence: 99%