Subnanowatt Carbon Nanotube Complementary Logic Enabled by Threshold Voltage Control

Abstract

In this Letter, we demonstrate thin-film single-walled carbon nanotube (SWCNT) complementary metal-oxide-semiconductor (CMOS) logic devices with subnanowatt static power consumption and full rail-to-rail voltage transfer characteristics as is required for logic gate cascading. These results are enabled by a local metal gate structure that achieves enhancement-mode p-type and n-type SWCNT thin-film transistors (TFTs) with widely separated and symmetric threshold voltages. These complementary SWCNT TFTs are integrated to demonstrate CMOS inverter, NAND, and NOR logic gates at supply voltages as low as 0.8 V with ideal rail-to-rail operation, subnanowatt static power consumption, high gain, and excellent noise immunity. This work provides a direct pathway for solution processable, large area, power efficient SWCNT advanced logic circuits and systems.

Tuning the threshold voltage of carbon nanotube transistors by n-type molecular doping for robust and flexible complementary circuits

“…The inverter demonstrated a very high noise margin of 28 V at a supply voltage of 80 V (70% of 1/2V DD ) and a gain of 85 (Fig. 4C), values that were not achieved for previously reported SWNT CMOS inverters (14,30,32). Our obtained noise margin value indicates that even if the noise causes the input voltage shift of 28 V at each direction, the inverter can still produce the correct output signal.…”

“…The advantages of CMOS circuits compared with unipolar logic circuits include lower power consumption, simpler circuit design, higher noise margin, better tolerance to the spread of threshold voltages of the transistors, and consequently higher circuit yields (15-17). Several approaches have been reported to adjust the threshold voltage of SWNTs and enable n-type SWNT transistors, including the use of (i): low-work function metal as source/drain contacts (20-22), (ii) atomic layer deposited (ALD) high-κ oxide on the SWNTs (23), and (iii) chemical doping on either the contacts or the bulk of SWNTs (14,(24)(25)(26)(27)(28)(29)(30)(31)(32). However, the continuous and reliable tuning of the threshold voltage of SWNT TFTs has not been achieved, thereby hindering optimal SWNT circuit performance.…”

Voltage-Controlled Ring Oscillators Based on Inkjet Printed Carbon Nanotubes and Zinc Tin Oxide

“…Finally, Ni (50 nm) was deposited by thermal evaporation through a shadow mask to form the top gate electrodes. 25 Electrical Characterization of Devices. All measurements were performed under ambient conditions.…”

High‐Gain Subnanowatt Power Consumption Hybrid Complementary Logic Inverter with WSe2 Nanosheet and ZnO Nanowire Transistors on Glass

“…Besides, there are no reports about the power consumption and switching speed of CMOS logic device based on WSe 2 nanosheet, while it is one of the important advantages of CMOS device architecture. [30][31][32] Here, we introduce a 1D-2D hybrid complementary (h-CMOS) logic inverter by coupling p-channel WSe 2 nanosheet FET and n-channel ZnO nanowire FET on a glass substrate aiming at high speed, low-power-consumption devices. In order to place WSe 2 nanosheet near ZnO nanowire FET, we used a direct imprinting method.…”