Study on the degradation of NMOSFETs with ultra-thin gate oxide under channel hot electron stress at high temperature

Abstract

This paper studies the degradation of device parameters and that of stress induced leakage current (SILC) of thin tunnel gate oxide under channel hot electron (CHE) stress at high temperature by using n-channel metal oxide semiconductor field effect transistors (NMOSFETs) with 1.4-nm gate oxides. The degradation of device parameters under CHE stress exhibits saturating time dependence at high temperature. The emphasis of this paper is on SILC of an ultra-thin-gate-oxide under CHE stress at high temperature. Based on the experimental results, it is found that there is a linear correlation between SILC degradation and V h degradation in NMOSFETs during CHE stress. A model of the combined effect of oxide trapped negative charges and interface traps is developed to explain the origin of SILC during CHE stress.

An Algorithm on Direct Tunneling Current Model Based on DIBL Effect

“…Aggressive scaling of MOS devices requires use of ultra-thin gate oxides to maintain a reasonable short channel effect [2]. ITRS predicts gate-oxide thicknesses less than 1.4 nm for sub-100-nm CMOS which results in considerable direct tunneling current [3,4]. For CMOS devices with thinner oxides, the gate-to-channel tunneling current becomes appreciable and dominates the total static state leakage of the transistor [5].…”