Study of Rapid Thermal Precleaning for Si Epitaxial Growth

Hsieh, T. Y.; Jung, Keun Hwa; Kwong, D. L.; Koschmieder, T. H.; Thompson, James C.

doi:10.1149/1.2221163

Cited by 10 publications

(5 citation statements)

References 39 publications

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“…Hydrogen desorption, if overdone, also leads to etching of the Si surface. 3,13,14 Thus, as will also be shown in this paper, sub-optimal desorption results in incomplete oxide removal and excessive desorption results in surface damage. This necessitates the use of an optimum time-temperature thermal desorption step, with or without ex-situ oxide removal.…”

mentioning

confidence: 52%

An early in-situ stress signature of the AlN-Si pre-growth interface for successful integration of nitrides with (111) Si

Chandrasekar

Mohan

Bardhan

et al. 2013

Applied Physics Letters

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The integration of MOCVD grown group III-A nitride device stacks on Si (111) substrates is critically dependent on the quality of the first AlN buffer layer grown. A Si surface that is both oxide-free and smooth is a primary requirement for nucleating such layers. A single parameter, the AlN layer growth stress, is shown to be an early (within 50 nm), clear (<0.5 GPa versus >1 GPa) and fail-safe indicator of the pre-growth surface, and the AlN quality required for successful epitaxy. Grain coalescence model for stress generation is used to correlate growth stress, the AlN-Si interface and crystal quality.

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mentioning

confidence: 52%

An early in-situ stress signature of the AlN-Si pre-growth interface for successful integration of nitrides with (111) Si

Chandrasekar

Mohan

Bardhan

et al. 2013

Applied Physics Letters

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“…surfaces with dangling bonds being mostly occupied by H or F atoms that are stable for a few tens of minutes in ambient conditions, enabling sample transfer and loading. An H 2 -bake, typically between 800 C and 900 C for a few tens of seconds up to a few minutes [11,[21][22][23][24][25][26], will lead to the removal of any C, O or F residual atoms and to the formation of smooth [24,27] (2 Â 1):H reconstructed surfaces that are much more stable in the air [28] (up to 40 h [29]).…”

Section: Surface Preparationmentioning

confidence: 99%

“…Several groups have tried to minimize the thermal budget necessary for the H 2 bake [21,25,26,30]. What has been found on fullsheet wafers is that an optimized wet clean [last step: 1:1000 HF(49%):deionized water] followed by an H 2 bake at 800 C for 2 min is sufficient at 10 Torrs to produce oxygen and carbon-free Si surfaces [26].…”

Section: Surface Preparationmentioning

confidence: 99%

Growth kinetics of Si on fullsheet, patterned and silicon-on-insulator substrates

Hartmann

Abbadie

Vinet

et al. 2003

Journal of Crystal Growth

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Using a reduced pressure-chemical vapor deposition cluster tool, we have studied the epitaxial growth of Si using either a silane or a dichlorosilane+hydrochloric acid chemistry on fullsheet, patterned and silicon-on-insulator (SOI) substrates. We have first of all developed a (''HF-last'' advanced wet cleaning+low thermal budget (775 C, 2 min) in situ H 2 bake) combination that yields atomically smooth, contamination free Si starting surfaces for both fullsheet and patterned wafers. We have then modeled the low temperature Si growth rate (silane or dichlorosilane+hydrochloric acid chemistry) on fullsheet wafers. A similar growth rate activation energy is found for both chemistries, i.e. E GR B50 kcal mol À1. The growth rate dependency on the Si precursor flow is vastly different, however. Fitting this dependency with a simple power law, a value of 0.36 is indeed associated to dichlorosilane, versus 0.92 for silane. The HCl etching rate is characterized by an activation energy E ER B34 kcal mol À1 , with a 0.52 power law dependency on the HCl flow. On patterned wafers, we have demonstrated that a deposited Si thickness limit (20 nm) exists at 775 C for high F ðHClÞ=F ðSiH 2 Cl 2 Þ mass flow ratios. This limit disappears when (i) F ðHClÞ=F ðSiH 2 Cl 2 Þ is reduced (ii) the growth temperature is increased to 800 C. Finally, we have highlighted the specifics of the growth on SOI wafers. A significant growth rate reduction (compared to bulk Si) has been evidenced on ultra-thin Si over-layer SOI wafers. It gets less and less pronounced as the buried oxide layer gets thinner and/or the Si over-layer thickness increases.

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“…The conventional method of desorbing the native oxide from the silicon surface by a high temperature (>1000ЊC) anneal is incompatible with ULSI. 8 These concerns have resulted in the development of a cleaning process which removes the native oxide in a dilute HF etch, leaving the surface passivated with hydrogen. Hydrogen desorbs at lower temperatures (ϳ400ЊC) which is compatible with low thermal budget requirements of ULSI.…”

mentioning

confidence: 99%

“…15 Using a rapid thermal (RT) CVD reactor, Hsieh et al demonstrated that good quality epitaxial films were deposited by a surface preparation method that consists of a dilute HF dip and DI water rinse followed by hydrogen bake for 60 s at 800ЊC. 8 In 1995, using an ultrahigh vacuum rapid thermal CVD system and a similar ex situ clean, Sanganeria et al showed that interfacial carbon and oxygen could be reduced below the secondary ion mass spectroscopy (SIMS) detection levels by an in situ clean at 800ЊC/10 s in an ambient free of any chlorinated residuals. 16 In an earlier publication, we studied this surface preparation method in a chlorinated ambient for selective silicon epitaxial growth and demonstrated that a vacuum anneal at 800ЊC for 10 s was sufficient to reduce the oxygen and chlorine on Si(100) below the SIMS detection levels and significantly reduce the interfacial carbon.…”

mentioning

confidence: 99%

Low Thermal Budget Surface Preparation for Selective Epitaxy. A Study on Process Robustness

Celik

Öztürk

1999

J. Electrochem. Soc.

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The robustness of a low thermal budget surface preparation method for selective silicon epitaxial growth has been investigated. After the HF dip, the stability of hydrogen passivation on Si(100) in deionized water and air has been studied. No significant increase was observed in oxygen and carbon coverage for deionized water rinse times varying from 10 to 1000 s. On wafers exposed to air for up to 10,000 s, carbon coverage on Si(100) stayed at the same level, whereas the oxygen coverage increased steadily. An in situ clean at 800°C for 10 s reduced the interfacial oxygen below the secondary ion mass spectroscopy detection levels on wafers that had been contaminated by exposure to air for up to 1000 s. In situ cleaning was studied in ambients with different partial pressures of intentionally introduced oxygen and nitrogen backgrounds. Oxygen was removed from Si(100) during the in situ clean for nitrogen partial pressures up to 1×10−6 normalTorr . When the oxygen partial pressure is sufficiently high false(1×10−6 normalTorrfalse) , oxide removal was not complete after in situ cleaning. There was no observable increase in the surface roughness for samples annealed in oxygen partial pressure up to 1×10−5 normalTorr . Hydrogen passivation was removed from the substrates and the surfaces were exposed to vacuum at room temperature for different times. After 10,000 s, the oxygen coverage was less than 2% of a monolayer. The carbon contamination on the surface was instantaneous and no additional carbon accumulation on the surface was observed up to 10,000 s. There was no apparent increase in the defect density for these wait times. © 1999 The Electrochemical Society. All rights reserved.

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Study of Rapid Thermal Precleaning for Si Epitaxial Growth

Cited by 10 publications

References 39 publications

An early in-situ stress signature of the AlN-Si pre-growth interface for successful integration of nitrides with (111) Si

An early in-situ stress signature of the AlN-Si pre-growth interface for successful integration of nitrides with (111) Si

Growth kinetics of Si on fullsheet, patterned and silicon-on-insulator substrates

Low Thermal Budget Surface Preparation for Selective Epitaxy. A Study on Process Robustness

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