2011
DOI: 10.1109/ted.2011.2161990
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Study of Random Dopant Fluctuation Effects in Germanium-Source Tunnel FETs

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Cited by 160 publications
(60 citation statements)
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“…The other problem with the TFET is that in aggressively scaled devices, random variability in transistor performance due to random dopant fluctuations (RDF) can become significant [15]. The effects of RDF, such as an unacceptably large increase in the OFF-state current, have recently been demonstrated in TFETs [16][17][18][19]. The presence of doped source and drain regions in TFETs also necessitates a complex thermal budget due to the need for ion implantation and expensive thermal annealing techniques [20][21][22].…”
Section: Introductionmentioning
confidence: 99%
“…The other problem with the TFET is that in aggressively scaled devices, random variability in transistor performance due to random dopant fluctuations (RDF) can become significant [15]. The effects of RDF, such as an unacceptably large increase in the OFF-state current, have recently been demonstrated in TFETs [16][17][18][19]. The presence of doped source and drain regions in TFETs also necessitates a complex thermal budget due to the need for ion implantation and expensive thermal annealing techniques [20][21][22].…”
Section: Introductionmentioning
confidence: 99%
“…The optimized structure [22] is taken to be the nominal design in this paper. The nominal device structure is shown in Fig.…”
Section: A Tfet Design and Tcad Models Usedmentioning
confidence: 99%
“…Therefore, the electrical behavior is strongly dependent on the geometry as well as the doping of this region. The impact of RDF was previously examined in [22], [23]. Since gate LER can affect the length of the gate-to-source overlap region, it is important to also assess the impact of gate LER.…”
mentioning
confidence: 99%
“…It is because the electrical characteristics of TFETs are mainly determined by gate metal WF values near the source region where band-to-band tunneling mainly Table I. occurs. Because the process-induced variation is a big obstacle to TFET circuit design [7]- [10], design strategies need to be investigated for the suppression of WFV of TFETs. As discussed earlier, WFV stems from different grain orientations in metal gate.…”
Section: Introductionmentioning
confidence: 99%