Structuring decompiled graphs

Cifuentes, Cristina

doi:10.1007/3-540-61053-7_55

Cited by 27 publications

(18 citation statements)

References 24 publications

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“…In the first iteration, the smart buffer fetches the first four array elements that make up the first window. The window of the second iteration contains three elements (A [1], A [2], and A [3]) from the window of the first iteration. In this case, the smart buffer only fetches a single element (A [4]).…”

Section: Advanced Register/memory Structures -Smart Buffersmentioning

confidence: 99%

“…Most of our decompilation techniques are based on work done by Cifuentes [3][4] [5]. We use our own techniques to recover arrays and remove assembly overhead.…”

Section: Decompilationmentioning

confidence: 99%

“…We recover loop structures using interval analysis [3]. An interval contains a maximum of one loop, which must start at the head of the interval.…”

Section: Control Structure Recoverymentioning

confidence: 99%

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Techniques for synthesizing binaries to an advanced register/memory structure

Stitt

Zhi

Najjar

et al. 2005

Proceedings of the 2005 ACM/SIGDA 13th International Symposium on Field-Programmable Gate Arrays

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Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with minimal impact, porting existing binaries to FPGAs, and even dynamically synthesizing software kernels to faster FPGA coprocessors. Those works showed that standard binary decompilation methods can recover enough high-level control information to result in reasonably-efficient hardware. However, recent synthesis methods for FPGAs utilize advanced memory structures, such as a "smart buffer," that require recovery of additional high-level information, specifically information about loops and arrays. We incorporate decompilation techniques into an existing binary synthesis tool flow to recover loops and arrays in order to take advantage of advanced memory structures when performing synthesis from a binary. We demonstrate through experiments on six benchmarks that our methods improve binary synthesis performance by 53%, by making effective use of smart buffers. Furthermore, we compare the binary results using smart buffers with results of synthesis directly from the original C code for the benchmarks, and show that our methods achieved almost identical performance results with only 10% area overhead.

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Section: Advanced Register/memory Structures -Smart Buffersmentioning

confidence: 99%

“…Most of our decompilation techniques are based on work done by Cifuentes [3][4] [5]. We use our own techniques to recover arrays and remove assembly overhead.…”

Section: Decompilationmentioning

confidence: 99%

See 1 more Smart Citation

Techniques for synthesizing binaries to an advanced register/memory structure

Stitt

Zhi

Najjar

et al. 2005

Proceedings of the 2005 ACM/SIGDA 13th International Symposium on Field-Programmable Gate Arrays

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show abstract

“…Baker [14] proposed an algorithm for finding high-level control constructs (e.g., if-then-else, while loops) in goto-riddled FORTRAN programs. Cifuentes [15] used a similar procedure to reconstruct high-level information in control-flow graphs generated by decompiling executables. Since loops are the main concern in both works, and the SCFG our compiler generates have no loops, the algorithms are not a good fit for the problem here.…”

Section: Generating Well-structured C Codementioning

confidence: 99%

An Esterel compiler for large control-dominated systems

Edwards

2002

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-Embedded hard real-time software systems often need fine-grained parallelism and precise control of timing, things typical real-time operating systems do not provide. The Esterel language has both, but compiling large Esterel programs has been challenging, producing either needlessly slow or large code. This paper presents the first Esterel compiler able to compile large Esterel programs into fast, small code. By choosing a concurrent control-flow graph (CCFG) as its intermediate representation, it preserves many of the control constructs to produce code that can be 100 times faster and half the size than code from other compilers with similar capacity. The primary contribution is an algorithm that generates efficient sequential code from a CCFG. While developed specifically for compiling Esterel, the algorithm could be used to compile other synchronous languages with fine-grained parallelism.

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“…For instance, the loops might be written with the use of while or do-while operators in the original Java sources. In essence, the exploited algorithms are similar to those of related works [18], [19]. However, in order to make them work properly on a variety of real-world Java applications, we had to carefully adapt the algorithms to the Java bytecode specification.…”

Section: Implementation Notesmentioning

confidence: 99%

Effective Enhancement of Loop Versioning in Java

Mikheev

Fedoseev

Sukharev

2002

Lecture Notes in Computer Science

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Abstract. Run-time exception checking is required by the Java Language Specification (JLS). Though providing higher software reliability, that mechanism negatively affects performance of Java programs, especially those computationally intensive. This paper pursues loop versioning, a simple program transformation which often helps to avoid the checking overhead. Basing upon the Java Memory Model precisely defined in JLS, the work proposes a set of sufficient conditions for applicability of loop versioning. Scalable intra-and interprocedural analyses that efficiently check fulfilment of the conditions are also described. Implemented in Excelsior JET, an ahead-of-time compiler for Java, the developed technique results in significant performance improvements on some computational benchmarks.

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Structuring decompiled graphs

Cited by 27 publications

References 24 publications

Techniques for synthesizing binaries to an advanced register/memory structure

Techniques for synthesizing binaries to an advanced register/memory structure

An Esterel compiler for large control-dominated systems

Effective Enhancement of Loop Versioning in Java

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