Structural properties of thin films of high dielectric constant materials on silicon

Lu, Hongcheng; Yasuda, Naoki; Garfunkel, Eric; Gustafsson, T.; Chang, Jane P.; Opila, R. L.; Alers, G. B.

doi:10.1016/s0167-9317(99)00390-1

Cited by 7 publications

(2 citation statements)

References 15 publications

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“…[15][16][17][18] The interfacial layer has a lower dielectric constant and the effective dielectric constant will consequently be reduced. [15][16][17][18] The interfacial layer has a lower dielectric constant and the effective dielectric constant will consequently be reduced.…”

Section: Resultsmentioning

confidence: 99%

Simulation and dielectric characterization of reactive dc magnetron cosputtered (Ta2O5)1−x(TiO2)x thin films

Westlinder

Zhang

Engelmark

et al. 2002

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Effects of substrate temperature on properties of pulsed dc reactively sputtered tantalum oxide films New capacitor material with high dielectric constant is needed for future integrated capacitor structures. Tantalum pentoxide (Ta 2 O 5 ) is considered as one of the most promising candidates. In this article, thin films of (Ta 2 O 5 ) 1Ϫx (TiO 2 ) x were grown utilizing reactive dc magnetron cosputtering of tantalum and titanium in an argon/oxygen atmosphere. By varying the input power at the targets, the composition of the thin film is easily controlled. The composition of the films was analyzed with elastic recoil detection analysis revealing the titanium oxide content ͑x ranging from 0 to 0.40͒. The presented results indicate that reactive sputter deposited tantalum pentoxide, with or without the addition of titanium, exhibits the properties required to meet the demands for future dielectric materials in integrated capacitors. The dielectric constant for metal-insulator-semiconductor structures is about 20 and the leakage current density is below 10 nA/cm 2 at 0.5 MV/cm, if the annealing temperature does not exceed 600°C. Annealing at 800°C leads to ϳ50% increase in dielectric constant with a cost of a severe increase in leakage current.

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Section: Resultsmentioning

confidence: 99%

Simulation and dielectric characterization of reactive dc magnetron cosputtered (Ta2O5)1−x(TiO2)x thin films

Westlinder

Zhang

Engelmark

et al. 2002

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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“…1 Yet, obstacles such as excessive leakage ͑tunneling͒ current, reduced drive current, and reliability issues, pose severe limitations 2 to such extreme reduction of d SiO 2 . Though addressed before in connection with IC technology, this has recently propelled research [5][6][7] in appropriate alternative high-materials for replacing SiO 2 gates in future deep sub-m MOS generations. For example, regarding SiO 2 , a minimum absolute physical thickness of ϳ0.8 nm ͑about three atomic layers of silicon dioxide͒ appears required to maintain the bulk band gap.…”

Section: Introductionmentioning

confidence: 99%

Defects at the interface of (100)Si with ultrathin layers of SiOx, Al2O3, and ZrO2 probed by electron spin resonance

Stesmans¹,

Afanasʼev²

2002

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Thermally induced interface degradation in (100) and (111) Si/SiO 2 analyzed by electron spin resonance An electron spin resonance study has been carried out on ͑100͒Si/SiO x /ZrO 2 and ͑100͒Si/Al 2 O 3 /ZrO 2 stacks with nm-thin dielectric layers grown by the atomic layer chemical vapor deposition method at 300°C. This reveals the Si dangling bond type centers P b0 , P b1 as prominent defects at the ͑100͒Si/dielectric interface in both types of structures. While reassuring for the Si/SiO x /ZrO 2 case, this P b0 , P b1 fingerprint, archetypal for the thermal ͑100͒Si/SiO 2 interface, indicates that the as-deposited ͑100͒Si/Al 2 O 3 interface is basically ͑100͒Si/SiO 2 -like. Yet, as exposed by the salient spectroscopic properties of the P b0 , P b1 defects, the interfaces are found to be in an enhanced ͑less relaxed͒ stress state, generally characteristic of low-temperature Si/SiO 2 fabrication. The thermal behavior has been addressed by subjecting the sample stacks to heat treatments in vacuum or O 2 ambient. Based on the P b0 , P b1 criterion, it is found that standard thermal Si/SiO 2 interface properties may be approached by appropriate annealing ͑у650°C͒ in vacuum in the case of Si/SiO x /ZrO 2 . Yet, O 2 ambient is required for Si/Al 2 O 3 , indicating that the initial interface is too abrupt to enable thermal interfacial rearrangement without growth of an additional SiO x interlayer. A minimal SiO x interlayer thickness ͑0.5 nm͒ appears requisite. Thus, Si/high-metal oxide structures may be endowed with device quality interfaces with sub-nm thin SiO x interlayer, which may support the applicability of high-metal oxides. Obviously, though, the ͑inherent͒ occurrence of an SiO x interlayer will impair the minimal equivalent SiO 2 thickness that may ultimately be realized with an envisioned high-material.

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ZrO2 thin films on Si substrate

Wong

Cheong

2010

J Mater Sci: Mater Electron

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Structural properties of thin films of high dielectric constant materials on silicon

Cited by 7 publications

References 15 publications

Simulation and dielectric characterization of reactive dc magnetron cosputtered (Ta2O5)1−x(TiO2)x thin films

Simulation and dielectric characterization of reactive dc magnetron cosputtered (Ta2O5)1−x(TiO2)x thin films

Defects at the interface of (100)Si with ultrathin layers of SiOx, Al2O3, and ZrO2 probed by electron spin resonance

ZrO2 thin films on Si substrate

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