Structural models of finite-state machines for their implementation on programmable logic devices and systems on chip

Klimowicz, Adam; Соловьев, В. В.

doi:10.1134/s1064230715010074

Cited by 14 publications

(5 citation statements)

References 18 publications

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“…By applying the initial SG stage to the ISM A of Figure 2, the set of groups obtained is G π 3 = {g 1 , g 23 , g 4567 } = {{s 1 }, {s 2 , s 3 }, {s 4 , s 5 , s 6 , s 7 }} (see the last column of A π 3 in Figure 3); therefore, SGA reaches the minimum number of groups, which is 3, using (2).…”

Section: Let W (R)mentioning

confidence: 99%

“…Researchers have devoted significant attention to the optimization of Finite State Machine (FSM) implementations regarding area, speed, or power consumption over decades [1][2][3][4][5][6][7][8]. Current Field Programmable Gate Array (FPGA) devices include Embedded Memory Blocks (EMBs), which allow, among other elements, the implementation of ROM memory.…”

Section: Introductionmentioning

confidence: 99%

“…Therefore, the output and transition functions of an FSM can be mapped into EMBs. The advantages of these implementations, called ROM-based FSM implementations, are the following: (1) if FSMs are mapped into non-used EMBs, the saved Lookup Tables (LUTs) can be used for implementing other components of the system [9]; (2) when the implementation of the function using LUTs requires a considerable number of logic levels, the speed can be increased by mapping the function on EMBs [10,11]; and (3) the EMBs used to implement the FSM can be disabled during the idle states, achieving a substantial reduction in power consumption [12].…”

Section: Introductionmentioning

confidence: 99%

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A New Approach for Implementing Finite State Machines with Input Multiplexing

Garcia-Vargas,

Senhadji-Navarro

2023

Electronics

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The model called Finite State Machine with Input Multiplexing (FSMIM) was proposed as a mechanism for implementing Finite State Machines (FSMs) using ROM memory. This paper presents a novel approach for achieving more efficient FSMIM implementations in Field Programmable Gate Array (FPGA) devices. The aim of the proposed approach is to obtain further reductions in the use of Embedded Memory Blocks (EMBs). Unlike previous works, the proposed approach reduces the depth of the ROM by grouping states before simplifying the input selectors of the FSMIM. For this purpose, a new strategy for grouping states is proposed, and its optimality is proven. In addition, a new variant of the Minimum Maximal k-Partial Matching (MMKPM) problem and its corresponding Integer Linear Programming (ILP) formulation are proposed for simplifying input selectors. The proposed approach requires a significantly smaller number of EMBs than the approaches proposed previously.

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Section: Let W (R)mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A New Approach for Implementing Finite State Machines with Input Multiplexing

Garcia-Vargas,

Senhadji-Navarro

2023

Electronics

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“…The FSMIM-T corresponding to the ISM A I SS requires r = log 2 3 + log 2 2 + log 2 1 = 3 selection bits. Supposing that the number of outputs (n) is 8, the FSMIM-T requires a ROM of 2 m • |S| = 48 words of n + p + r = 14 bits, that is, a ROM of 672 bits [this value can be obtained with (2)]. If we suppose EMBs of 512 bits with 32 words of 16 bits, then the FSMIM-T implementation requires two EMBs (this is only a toy example to illustrate the concept mentioned above, since EMBs are greater in real devices).…”

Section: Proposed State Groupingmentioning

confidence: 99%

“…In digital design, the implementation of Finite State Machines (FSMs) has received attention from researchers for decades [1][2][3][4][5][6][7][8]. Optimizing FSM implementations in terms of area, speed or power consumption is essential to meet the design constraints demanded by applications.…”

Section: Introductionmentioning

confidence: 99%

Optimization based on the minimum maximal k-partial-matching problem of finite states machines with input multiplexing

García-Vargas

Senhadji-Navarro

2022

Des Autom Embed Syst

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Finite State Machines with Input Multiplexing (FSMIMs) were proposed in previous work as a technique for efficient mapping Finite State Machines (FSMs) into ROM memory. In this paper, we present new contributions to the optimization process involved in the implementation of FSMIMs in Field Programmable Gate Array (FPGA) devices. This process consists of two stages: (1) the simplification of the bank of input selectors of the FSMIM, and (2) the reduction of the depth of the ROM. This has a significant impact both on the number of used Look-Up Tables (LUTs) and on the number of the Embedded Memory Blocks (EMBs) required by the ROM. For the first stage, we present two approaches to optimize FSMIM implementations based on the Minimum Maximal k-Partial Matching (MMKPM) problem: one of them applies the greedy algorithm for the MMKPM problem, and the other based on a new multiobjetive variant of the MMKPM and its corresponding Integer Linear Programing formulation. We also propose a modification of the second stage, in which the characteristics of EMBs are taken into account to improve implementation results. The new optimization process significantly reduces the number of used FPGA resources with respect to the previous one. In addition, the proposed approaches achieve an adequate trade-off between the usage of EMBs and LUTs with respect to conventional FSM implementations based on ROM and to those based on LUT.

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State Assignment of Finite-State Machines by Using the Values of Output Variables

Salauyou

Ostapczuk

2020

Advances in Intelligent Systems and Computing

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Structural models of finite-state machines for their implementation on programmable logic devices and systems on chip

Cited by 14 publications

References 18 publications

A New Approach for Implementing Finite State Machines with Input Multiplexing

A New Approach for Implementing Finite State Machines with Input Multiplexing

Optimization based on the minimum maximal k-partial-matching problem of finite states machines with input multiplexing

State Assignment of Finite-State Machines by Using the Values of Output Variables

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