Strain-mediated multilevel ferroelectric random access memory operating through a magnetic field

Abstract

Three hysteresis loops between the toroidal moment and vorticity in the ferroelectric memory cell with four stable vortex states.

Controlled inter-state switching between quantized conductance states in resistive devices for multilevel memory

“…[3][4] It has been proposed that the multiple stable states available in the resistive switches can be used for multilevel storage for ultrahigh density memories. 5 Existence of stable multistates has been demonstrated in resistive switching, [6][7][8][9][10][11][12][13][14] ferroelectric [15][16][17][18][19][20] and phase change [21][22][23][24][25] memory devices. Atomic point contact based QC observed in resistive switching devices has also been demonstrated for memory applications.…”

Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices

“…13 To overcome the above-mentioned limitations, a multi-level non-volatile memory (MLNVM) concept, which can store multiple data bits in a single memory cell, has been usually realized through controlled polarization switching by changing the external voltage, [15][16][17][18] although other techniques have been employed, for instance, dual gates, 19 polarization-dependent photovoltaic effect, 20 and strain-mediated multiple polarization vortices by external magnetic fields. 21 Among various types of MLNVM devices, ferroelectric polymer-based MLNVM devices based on poly(vinylidene fluoride) (PVDF) and its copolymers with trifluoroethylene [P(VDF-TrFE)] have gained strong interest due to low-cost processes, solution processability, and mechanical flexibility. [15][16][17][22][23][24] However, previously reported devices have macroscale cell size which limits the storing of a lot of data.…”

“…[15][16][17][22][23][24] However, previously reported devices have macroscale cell size which limits the storing of a lot of data. [15][16][17][18][19][20][21] Furthermore, because they only operate by single data writing (SDW), the writing (or operating) speed is in principle slow. [15][16][17][18][19][20][21] Hence, the best strategy for developing high capacity storage MLNVM devices with fast writing speed is to prepare a high density array of nano-sized ferroelectric polymers that operate individually as a single memory cell and are capable of multiple data writing (MDW).…”

“…[15][16][17][18][19][20][21] Furthermore, because they only operate by single data writing (SDW), the writing (or operating) speed is in principle slow. [15][16][17][18][19][20][21] Hence, the best strategy for developing high capacity storage MLNVM devices with fast writing speed is to prepare a high density array of nano-sized ferroelectric polymers that operate individually as a single memory cell and are capable of multiple data writing (MDW). In this work, we introduce a novel concept for preparing a high density array of multi-floor cascading nanostructures along the thickness direction of cross-linked P(VDF-TrFE) [cP(VDF-TrFE)] by employing innovative anodized aluminum oxide (AAO) templates with pores having inverse multi-floor cascading depth profiles.…”

Observation of an exotic lattice structure in the transparent KTa1−xNbxO3 perovskite supercrystal

“…4(b)]. As a result of a combination of tetragonal units, each vortex has an equally elaborate associated strain configuration that also depends on its surroundings, a phenomenon typically used to encode ferroelectric memory devices [51].…”