Storage class memory based SSD performance in consideration of error correction capabilities and write/read latencies

Takishita, Hirofumi; Onagi, Takahiro; Takeuchi, Ken

doi:10.1109/snw.2016.7578000

Cited by 2 publications

(1 citation statement)

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“…Low-density parity-check (LDPC) code 14) is another choice to be applied to NAND flash, which has higher error correction capability than BCH. Our previous works have studied system performance of SCM and NAND flash hybrid storage with BCH, 15,16) SCM only storage with BCH, 17) and NAND flash only storage with BCH and LDPCs. 18) In addition, error reduction strategies of SCM in hybrid and all-SCM storage are investigated.…”

Section: Introductionmentioning

confidence: 99%

Analysis on applicable error-correcting code strength of storage class memory and NAND flash in hybrid storage

Matsui¹,

Kinoshita²,

Takeuchi³

2018

Jpn. J. Appl. Phys.

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A hybrid of storage class memory (SCM) and NAND flash is a promising technology for high performance storage. Error correction is inevitable on SCM and NAND flash because their bit error rate (BER) increases with write/erase (W/E) cycles, data retention, and program/read disturb. In addition, scaling and multi-level cell technologies increase BER. However, error-correcting code (ECC) degrades storage performance because of extra memory reading and encoding/decoding time. Therefore, applicable ECC strength of SCM and NAND flash is evaluated independently by fixing ECC strength of one memory in the hybrid storage. As a result, weak BCH ECC with small correctable bit is recommended for the hybrid storage with large SCM capacity because SCM is accessed frequently. In contrast, strong and long-latency LDPC ECC can be applied to NAND flash in the hybrid storage with large SCM capacity because large-capacity SCM improves the storage performance.

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