Storage and release of buffer charge in GaN-on-Si HEMTs investigated by transient measurements

Journal of Applied Physics

Abid

et al. 2021

Self Cite

294

126

Over the last decade, gallium nitride has emerged as an excellent material for the fabrication of power devices. Among the semiconductors for which power devices are already available on the market, GaN has the widest energy gap, the largest critical field, the highest saturation velocity, thus representing an excellent material for the fabrication of high speed/high voltage components.The presence of spontaneous and piezoelectric polarization allows to create a 2-dimensional electron gas, with high mobility and large channel density, in absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable high frequency operation, with consequent advantages in terms of miniaturization.For high power/high voltage operation, vertical device architectures are being proposed and investigated, and 3-dimensional structuresfin-shaped, trench-structured, nanowire-basedare demonstrating a great potential. Contrary to silicon, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This tutorial paper describes the physics, technology and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main properties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail, to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN, and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight on the most relevant aspects gives the reader a comprehensive overview on present and next-generation GaN electronics. IntroductionOver the past decade, gallium nitride has emerged as an excellent material for the fabrication of power semiconductor devices. Thanks to the unique properties of GaN, diodes and transistors based on this material have excellent performance, compared to their silicon counterparts, and are expected to find wide application in the next-generation power converters. Owing to the flexibility and the energy efficiency of GaN-based power converters, the interest towards this technology is rapidly growing: the aim of this tutorial is to review the most relevant physical properties, the operating principles, the fabrication parameters, and the stability/reliability issues of GaN-based power transistors. For introductory purposes, we start summarizing the physical reasons why GaN transistors achieve a much better performance than the corresponding silicon devices, to help the reader understanding the unique advantages of this technology.The properties of GaN devices allow the fabrication of high-efficiency (near or above 99 %)...

Section: Buffer Trapsmentioning

confidence: 99%

GaN-based power devices: Physics, reliability, and perspectives

Meneghini

Journal of Applied Physics

Abid

et al. 2021

Self Cite

294

126

“…For longer times (phase 2 in figures 6 and 7), the carbon doped buffer starts depleting, and dynamic R on increases with time [11,18]. The effect is weaker on Wafers B which has the improved buffer, but the nature of the traps is the same.…”

Section: Pulsed-dct: Off Stressmentioning

confidence: 98%

Understanding the effects of off-state and hard-switching stress in gallium nitride-based power transistors

Modolo

Semicond. Sci. Technol.

Minetto

et al. 2020

Self Cite

The aim of this paper is to improve the understanding of gallium nitride (GaN) high electron mobility transistors (HEMTs) submitted to hard switching operation, with focus on the hot-electron phenomena. This is becoming a hot-topic both for the scientific community and for the industry. The analysis is carried out through a cross-comparison of three different experimental techniques: conventional Pulsed-IV characterization, a novel pulsed-drain current transient (P-DCT) method, and a custom-developed hard switching test protocol. Hard switching analysis was performed through a novel system able to test the device in hard-switching conditions with an unprecedented turn-on slew-rate of 25 V ns−1 on-wafer level. This allows μs to investigate the impact of hard switching in terms of (i) locus trajectory, (ii) dissipated power, and (iii) dynamic R on increase. Furthermore, the accumulation of switching stress is assessed by repeating the experiment with increasing frequency, from 1 kHz to 100 kHz. The extensive cross-analysis offers a novel insight on the degradation mechanisms occurring in power GaN HEMTs. The results collected within this paper allow: (1) to evaluate the dynamic behavior under both soft- and hard-switching stress, thus differentiating off-state and semi-on-state stress; (2) to pinpoint hot-electrons as the main cause of the current collapse observed in semi-on; (3) by comparing the results obtained from P-DCT and Hard Switching Analysis we demonstrate that the hot-electron trapping is a very fast process which can happen in few ns. The related trapping and de-trapping kinetics are investigated in detail. The results described within this paper provide novel insight on the important role of hot-electrons in the dynamic R on increase during hard switching operations.

“…Other reports [14][15][16][17][18] proposed that trapping in off-state originates from the ionization of buffer acceptors (CN atoms), that results in a partial depletion of the channel. Despite the importance of these two processes, no paper described the interplay of these two mechanisms and the related trapping/detrapping dynamics.…”

Section: Introductionmentioning

confidence: 99%

OFF-state trapping phenomena in GaN HEMTs: Interplay between gate trapping, acceptor ionization and positive charge redistribution

Canato

Meneghini

Microelectronics Reliability

et al. 2020

We present an extensive analysis of the trapping processes induced by drain bias stress in AlGaN/GaN highelectron-mobility transistors (HEMTs) with p-GaN gate. We demonstrate that: (i) with increasing drain stress, pulsed I-V and VTH measurements shown an initial positive VTH variation and an increase in RON then, for drain voltages >100 V, VTH is stable and the RON shows a partial recovery. (ii) At moderate voltages, VTH instability is related to trapping at the gate stack, due to residual negative charge left behind by the holes that leave the p-GaN layer through the Schottky gate contact and/or to trapping at the barrier. At higher voltages, we demonstrate the interplay of two trapping processes by C-V and pulsed drain current analysis: (iii) a fast storage of positive charge, accumulated near the buffer/SRL interface, not strongly thermally activated, dominating at higher voltages; (iv) a slower negative charge storage, thermally activated with activation energies for trapping and de-trapping equal to ~0.6 eV and ~0.4-0.8 eV, respectively.