Stochastic switching circuit synthesis

As CMOS devices are scaled down into the nanometer regime, concerns about reliability are mounting. Instead of viewing nanoscale characteristics as an impediment, technologies such as PCMOS exploit them as a source of randomness. The technology generates random numbers that are used in probabilistic algorithms. With the PCMOS approach, different voltage levels are used to generate different probability values. If many different probability values are required, this approach becomes prohibitively expensive.In this work, we demonstrate a novel technique for synthesizing logic that generates new probabilities from a given set of probabilities. Three different scenarios are considered in terms of whether the given probabilities can be duplicated and whether there is freedom to choose them. In the case that the given probabilities cannot be duplicated and are predetermined, we provide a solution that is FPGA-mappable. In the case that the given probabilities cannot be duplicated but can be freely chosen, we provide an optimal choice. In the case that the given probabilities can be duplicated and can be freely chosen, we demonstrate how to generate arbitrary decimal probabilities from small sets -a single probability or a pair of probabilities -through combinational logic.

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“…A similar problem to this is considered in [10]. These authors consider switching circuits instead of logic gates.…”

Section: Theoremmentioning

confidence: 98%

“…• Wilhelm and Bruck [10] proposed a general method for synthesizing switching circuits to achieve a desired probability. Their designs consist of relay switches that are open or closed with specified probabilities.…”

Section: Related Workmentioning

confidence: 99%

The synthesis of combinational logic to generate probabilities

Qian

Riedel

Bazargan

et al. 2009

Proceedings of the 2009 International Conference on Computer-Aided Design

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“…Wilhelm and Bruck proposed a scheme for synthesizing switching circuits that generate arbitrary binary probabilities [12]. By mapping every switch connected in series to an AND gate and every switch connected in parallel to an OR gate, we can easily derive a combinational circuit that generates an arbitrary binary probability.…”

Section: Algorithm 2 Reducedigit(ckt Z)mentioning

confidence: 99%

“…For the approximation error of the binary fraction for q to be below 1/10 n , the number of digits m of the binary fraction should be greater than n log 2 10. In [12], it is proved that the minimal number of probabilistic switches needed to generate a binary fraction of m digits is m. Assuming that we build an equivalent combinational circuit consisting of AND gates and inverters, we need m − 1 AND gates to implement the binary fraction. 2 Thus, the combinational logic realizing the binary approximation needs more than n log 2 10 ≈ 3.32n AND gates.…”

Section: Algorithm 2 Reducedigit(ckt Z)mentioning

confidence: 99%

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Transforming Probabilities With Combinational Logic

Qian

Riedel

Zhou

et al. 2011

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-Schemes for probabilistic computation can exploit physical sources to generate random values in the form of bit streams. Generally, each source has a fixed bias and so provides bits with a specific probability of being one. If many different probability values are required, it can be expensive to generate all of these directly from physical sources. This paper demonstrates novel techniques for synthesizing combinational logic that transforms source probabilities into different target probabilities. We consider three scenarios in terms of whether the source probabilities are specified and whether they can be duplicated. In the case that the source probabilities are not specified and can be duplicated, we provide a specific choice, the set {0.4, 0.5}; we show how to synthesize logic that transforms probabilities from this set into arbitrary decimal probabilities. Further, we show that for any integer n ≥ 2, there exists a single probability that can be transformed into arbitrary base-n fractional probabilities. In the case that the source probabilities are specified and cannot be duplicated, we provide two methods for synthesizing logic to transform them into target probabilities. In the case that the source probabilities are not specified, but once chosen cannot be duplicated, we provide an optimal choice. Index Terms-Logic synthesis, probabilistic logic, probabilistic signals, random bit streams, stochastic bit streams.

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