Stitching-error reduction in gratings by shot-shifted electron-beam lithography

Abstract

Calculations of the grating spatial-frequency spectrum and the filtering properties of multiple-pass electronbeam writing demonstrate a tradeoff between stitching-error suppression and minimum pitch separation. High-resolution measurements of optical-diffraction patterns show a 25-dB reduction in stitching-error side modes.

Polymeric lithography editor: Editing lithographic errors with nanoporous polymeric probes

“…Commonly encountered errors in standard lithographic techniques include mask critical dimension error ( 8 ) and exposure system aberration ( 9 ) in photolithography, and stitching ( 10 ) and overlay errors ( 11 ) in e-beam (electron beam) lithography; e-jet (electrohydrodynamic jet) ( 12 ), dip-pen nanolithography (DPN) ( 13 ), and DPN variants can suffer from errors common to any conventional printing process.…”

Tilt-corrected stitching for electron beam lithography

“…Dougherty et al [2] mention wafer tilt as a cause of stitching error. Typically electron beam tools correct for gain and rotation errors which are induced by variations in the wafer height, which is measured as a change in distance from the final lens to the wafer surface.…”

“…For many applications these errors can cause a serious loss in performance and there is a considerable body of work showing how the effects of stitching can be minimised. The main methods are to superimpose multiple exposures using different field sizes [1,2], reduce the field size [3], and to eliminate fields altogether by using a continuous MEBES type writing strategy [4]. Both of the first two methods increase writing times whereas the continuous writing strategy only improves stitching in one dimension.…”

Enhanced stitching for the fabrication of photonic structures by electron beam lithography

“…Several different approaches have previously been used to address this problem. These include methods to superimpose multiple exposures using different field sizes 1,2 and methods to reduce the field size. 3 Both result in increased pattern writing times.…”