2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools 2009
DOI: 10.1109/dsd.2009.159
|View full text |Cite
|
Sign up to set email alerts
|

Stereo Vision Algorithm Implementation in FPGA Using Census Transform for Effective Resource Optimization

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
9
0

Year Published

2011
2011
2023
2023

Publication Types

Select...
7
1

Relationship

0
8

Authors

Journals

citations
Cited by 21 publications
(9 citation statements)
references
References 4 publications
0
9
0
Order By: Relevance
“…To further enhance the contour features of objects under varying light level conditions, the census transform (CT) has been introduced into the gradient domain. 24 The encoded images reconstructed by the CT closely preserve the local structural features of the original gray-scale images. Compared with gradient images, CT images have less image data (reduced to 8-bit data from double-precision data), and do not need to be normalized.…”
Section: Light-level-independent Feature Extractionmentioning
confidence: 92%
See 1 more Smart Citation
“…To further enhance the contour features of objects under varying light level conditions, the census transform (CT) has been introduced into the gradient domain. 24 The encoded images reconstructed by the CT closely preserve the local structural features of the original gray-scale images. Compared with gradient images, CT images have less image data (reduced to 8-bit data from double-precision data), and do not need to be normalized.…”
Section: Light-level-independent Feature Extractionmentioning
confidence: 92%
“…24 The encoded images reconstructed by the CT closely preserve the local structural features of the original gray-scale images. Compared with gradient images, CT images have less image data (reduced to 8-bit data from double-precision data), and do not need to be normalized.…”
Section: Light-level-independent Feature Extractionmentioning
confidence: 98%
“…Moreover, accessed size and memory of FPGAs can be further decreased to allow performance of the CT algorithm to achieve up to 130 frames per second with an image size of 640×480 pixels [55]. Nevertheless, there is a study where the CT algorithm performance was able to reach up to 42 frames per second using CPUs [56].…”
Section: 1 Parametric Based Costsmentioning
confidence: 99%
“…Limitations & Concerns approach SAD [34] Uses uniqueness Local CPU Good accuracy with low Not applicable for high of minimum and median computational cost texture images filter SAD [2] Uses pyramid reduction, Local FPGA Extremely low and Poor performance in ZNCC similarity measures consistent computational homogenous regions and vergence angle control cost and low power consumption SAD [21] Uses various sizes of Local CPU Gives good results in non-Performance evaluation correlation window texture regions as well as under radiometric depth discontinuity distortion is not justified SAD [38] Only considers object edge Local CPU Faster than conventional Performance evaluation pixels in depth estimation SAD algorithm under radiometric calculation distortion is not justified SAD/SSD [37] Uses nuclear norm Local CPU Able to reduce occlusion Performance in terms of minimization error and performs better in computational cost is homogenous regions unclear SAD [40] Uses bilateral filter Local CPU Good accuracy and is able to Performance in terms of reduce noise computational cost is unclear NCC [83] Modified to be more like Local CPU Faster than conventional Quality of disparity map is template approximation NCC not verified NCC [84] Uses shape adaptive Local CPU Produces accurate disparity Not suitable for real time window and orthogonal map quickly application yet integral image technique NCC [44] Uses dirty filtering Local CPU High precision High computational cost ZNCC [85] Integrated within neural Local CPU Good in dealing with Ineffective in dealing network textureless areas occlusion and discontinuity CT [54] None Local ASIC Low computational cost Disparity map quality is not justified CT [53] None Local FPGA Low computational cost Post-processing is not included, so disparity quality can be further improved improved CT [55] Optimizes size and Local FPGA High speed with reduced Poor performance when memory access memory size image has noise CT [86] Combines with SAD and Local CPU Fast operation with Computational cost is not uses permeability filtering promising accuracy low enough for real time application CT [50] Uses coherency sensitive Local CPU High accuracy with fewer High computational cost hashing bad pixels CT [58] Uses random walk and Local CPU Minimizes noise Parameter selection is wavelet edge joint bilateral significantly, even in the crucial to ensure optimum toughest situation with performance addictive Gaussian noise DP [64] Uses generalized ground Global CPU Scanline inconsistency Not applicable for real control points scheme problem is removed time application DP [87] Uses adaptive aggregation Global CPU Faster and better than Implementation on CPU conventional DP based has high computational approach cost DP…”
Section: Stereo Modification Category Device Advantagesmentioning
confidence: 99%
“…Other authors [ 19 , 20 ] propose the use of census transform to calculate the disparity image. The census transform reduces size memory and accesses to that memory.…”
Section: Related Workmentioning
confidence: 99%