STDP and STDP variations with memristors for spiking neuromorphic learning systems

Abstract

In this paper we review several ways of realizing asynchronous Spike-Timing-Dependent-Plasticity (STDP) using memristors as synapses. Our focus is on how to use individual memristors to implement synaptic weight multiplications, in a way such that it is not necessary to (a) introduce global synchronization and (b) to separate memristor learning phases from memristor performing phases. In the approaches described, neurons fire spikes asynchronously when they wish and memristive synapses perform computation and learn at their own pace, as it happens in biological neural systems. We distinguish between two different memristor physics, depending on whether they respond to the original “moving wall” or to the “filament creation and annihilation” models. Independent of the memristor physics, we discuss two different types of STDP rules that can be implemented with memristors: either the pure timing-based rule that takes into account the arrival time of the spikes from the pre- and the post-synaptic neurons, or a hybrid rule that takes into account only the timing of pre-synaptic spikes and the membrane potential and other state variables of the post-synaptic neuron. We show how to implement these rules in cross-bar architectures that comprise massive arrays of memristors, and we discuss applications for artificial vision.

Parameter Exploration to Improve Performance of Memristor-Based Neuromorphic Architectures

“…On the other hand, if the post-synaptic neuron spikes shortly before the pre-synaptic neuron, the conductance of the synapse between the two neurons decreases. A more comprehensive explanation for STDP is beyond the scope of this research, however if readers want to know how plasticity in memristor helps targeting STDP achievement we refer you to [55].…”

Neuromorphic microelectronics from devices to hardware systems and applications

“…Nevertheless, the simplicity of the technique and its low area consumption make it an attractive candidate for analog storage. Long-term storage of analog weights may require floating-gate fabrication technologies, and memristors [80]. Three-dimensional chip stacking may offer solutions in future developments.…”

“…Several STDP learning models are discussed in [80,139] including STDP, double-spike STDP, quadratic STDP which are suitable to the usage of memristors, possibly arranged in arrays, Fig. 13 (c).…”

Simulation of the Spiking Neural Network based on Practical Memristor

“…What's more, memristor conductance can be tuned according to the delay time between two spikes successively applied to the device terminals. This regulation of memristor conductance implements the typical biological learning process named Spike TimeDependent-Plasticity (STDP) [11][12][13]. Constructing a SNN using memristors as synapses can take full advantage of the characteristics of memristors for high-density distribution and low power consumption.…”