Static Test Compaction for Scan Circuits by Using Restoration to Modify and Remove Tests

Abstract

This paper describes a new approach to static test compaction for scan circuits that modifies tests in order to reduce the number of tests in a test set. The main contribution of this paper is a procedure referred to as restoration. In a basic step, the restoration procedure considers two tests, t rem and t mod , with sets of detected faults D rem and D mod , respectively. Starting from t new = t mod , and considering t new as a variation of t rem , the procedure restores bits of t rem into t new as necessary to ensure that faults from D rem are detected by t new . The procedure then restores bits of t mod into t new as necessary to ensure that all the faults from D mod are detected by t new . The test t new is used for replacing t mod , and the faults it detects out of D rem are moved to D mod . After several such steps, if D rem becomes empty, t rem can be removed from the test set. The procedure is applied to test sets that are already compacted. The results show that the procedure can achieve significant additional compaction even without considering all the tests for removal or modification.