Static Optimal Scheduling for Synchronous Data Flow Graphs with Model Checking

Zhu, Xun; Yan, Rong; Gu, Yulei; Zhang, Jian; Zhang, Wenhui; Zhang, Guangquan

doi:10.1007/978-3-319-19249-9_34

Cited by 7 publications

(5 citation statements)

References 24 publications

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“…For every consistent and strongly connected SDFG, the state-space of a self timed execution consists of a finite sequence of states, called the transient phase followed by a sequence of states which is repeated infinitely often, called the periodic phase [8]. On a heterogeneous multiprocessor platform the selftimed execution does not provide the maximal throughput [17]. Scheduling f iterations as one schedule cycle may increase the throughput.…”

Section: Definition 6 (Repetition Vector) a Repetition Vector Of An mentioning

confidence: 99%

“…This approach works directly on an SDF graph, avoiding the conversion to an HSDF graph. For homogeneous multiprocessor platforms self-timed execution [8] gives maximal throughput but it is not true for heterogeneous multiprocessor platforms [17]. The paper [17] presents a method to find the maximal throughput on a heterogeneous multiprocessor platform for a given unfolding factor f .…”

Section: Introductionmentioning

confidence: 99%

“…Ahmad et al [1], Zhu et al [17] and Fakih et al [7] have previously used timed automata (TA) [2] to model This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/.…”

Section: Introductionmentioning

confidence: 99%

“…The paper [1] finds the maximal throughput for an SDF graph. The paper [17] presents a method for scheduling SDF graphs on heterogeneous multiprocessor platforms. The schedules are either throughput-optimal with best energy consumption or energy consumption-optimal with the best throughput for a given unfolding factor.…”

Section: Introductionmentioning

confidence: 99%

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Latency Evaluation of SDFGs on Heterogeneous Processors Using Timed Automata

et al. 2020

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Synchronous Data Flow (SDF) is a graphical computation model used for analyzing digital signal processing and real time multimedia applications. In general, these applications have two primary performance metrics-throughput and latency. Latency is important in multimedia processing applications such as video-conferencing, Internet telephony and games since latency surpassing a specific limit results in poor quality of service (QoS). Past work had focused on computing the latency of SDF graphs on homogeneous multiprocessor platforms. In this paper, we present an approach to compute the latency of a static schedule for a given unfolding factor with an optimal throughput for an SDF graph on a heterogeneous multiprocessor platform using timed automata. We use timed automata as a semantic model to represent the system model, which includes a synchronous data flow graph and an execution platform. We use the UPPAAL model-checker to specify the resulting network of timed automata and compute the latency.

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Section: Definition 6 (Repetition Vector) a Repetition Vector Of An mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Latency Evaluation of SDFGs on Heterogeneous Processors Using Timed Automata

et al. 2020

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“…In [17,18] the authors (similar to the work in [5]) transform a system model which includes an SDFG and a multiprocessor platform to a (priced) timed automata network and utilize an extended model-checker (UPPAAL CORA) to obtain optimal schedules combining optimization goals with optimal throughput and energy consumption.…”

Section: Related Workmentioning

confidence: 99%

Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication

Stemmer

Fakih

Grüttner

et al. 2017

Proceedings of the 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools

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CITATIONS 0 READS 22 4 authors, including: Some of the authors of this publication are also working on these related projects: 3Ccar -Integrated Components for Complexity Control in affordable electrified cars View project SAFEPOWER -Safe and secure mixed-criticality systems with low power requirements View project Maher Fakih OFFIS e.V. ABSTRACTScenario-Aware Data-Flow Graphs (SADFGs) were introduced to capture the behavior of embedded applications achieving a good trade-off between expressiveness and analyzability. On the one side, they support the timing analysis of real-time applications, especially those running on MPSoCs, due to the clean separation of computation and communication phases in their executing nodes. On the other side, SADFGs allow the expression of a more dynamic behaviors than Synchronous dataflow graphs by allowing dynamic token-rates of single nodes depending on pre-defined typical scenarios. The fact which leads to more efficiency and better throughput.In this paper, we describe the extension of a previous model-checking based real-time analysis approach to allow the analysis of timing bounds for FSM-SADFGs mapped on a shared memory multiprocessor architecture. We demonstrate our approach on an MPEG decoder application being viable to obtain the worst-case end-to-end latency of its implementation under different scenarios on a 2-tiles MPSoC.

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Pareto Optimal Scheduling of Synchronous Data Flow Graphs via Parallel Methods

Zhu

Zhang

2015

Dependable Software Engineering: Theories, Tools, and Applications

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Static Optimal Scheduling for Synchronous Data Flow Graphs with Model Checking

Cited by 7 publications

References 24 publications

Latency Evaluation of SDFGs on Heterogeneous Processors Using Timed Automata

Latency Evaluation of SDFGs on Heterogeneous Processors Using Timed Automata

Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication

Pareto Optimal Scheduling of Synchronous Data Flow Graphs via Parallel Methods

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