State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores

Tenentes,; Kavousianos,; Kalligeros,

doi:10.1109/date.2008.4484726

Cited by 22 publications

(17 citation statements)

References 33 publications

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“…To overcome the inefficiency problem of pseudo random patterns in detecting random-pattern-resistant (r.p.r) faults, various BIST methods that are capable of applying additional deterministic patterns [2][3][4][5][6][7][8][9][10][11][12][13][14][15] or generate only deterministic patterns [16][17][18] are proposed. These deterministic patterns can be generated via reseeding [2-5, 10-13, 16-18] or through some additional specific logic such as mapping logic [14][15].…”

Section: Introductionmentioning

confidence: 99%

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A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume

Lien

Lee

Hsieh

2012

2012 IEEE 21st Asian Test Symposium

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This paper proposes a new test-per-clock BIST method that attempts to minimize the test sequence length and the test data volume simultaneously. An efficient LFSR reseeding algorithm is developed by which each determined seed together with its derived patterns can detect the maximum number of so far undetected faults. During the seed determination process an adaptive X-filling process is first employed to generate a set of candidate patterns for pattern embedding. The process then derives a seed solution that can embed multiple candidate patterns at one time so as to minimize the number of seeds. To shorten the test sequence, the pattern embedding process begins with a small initial set of pseudo-random patterns and will incrementally add more patterns only when necessary. Experimental results show that compared with the previous test-per-clock techniques based on the LFSR-and twisted-ring-counter-reseeding methods, our method can reduce the test sequence length by over 60% with generally smaller numbers of storage bits. When compared with the mapping-logic-based BIST methods, our method can reduce the test sequence length by over 50% with a comparable area overhead.

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Section: Introductionmentioning

confidence: 99%

“…These BIST methods can generally be classified into test-per-scan [2][3][4][5][6][7][8][9][10] and test-per-clock [11][12][13][14][15][16][17][18] methods according to their test application schemes. The test-per-scan method serially loads one test pattern into scan chains bit-by-bit.…”

Section: Introductionmentioning

confidence: 99%

A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume

Lien

Lee

Hsieh

2012

2012 IEEE 21st Asian Test Symposium

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show abstract

“…Specifically, large values of w offer very high compression at the expense of relatively increased test sequence length, whereas small values of w offer short test sequence length at the expense of relatively reduced compression [15]. In the degenerate case of w=1, every seed generates only one test vector.…”

Section: A Generation Of Candidate Seedsmentioning

confidence: 99%

Defect Coverage-Driven Window-Based Test Compression

Kavousianos

Chakrabarty

Kalligeros

et al. 2010

2010 19th IEEE Asian Test Symposium

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Abstract-Although LFSR reseeding based on test cubes for modeled faults is an efficient test compression approach, it suffers from the drawback of limited, and often unpredictable, coverage of unmodeled defects. We present a new defect coverage-driven window-based LFSR reseeding technique, which offers both high test quality and high compression. The efficiency of the proposed encoding technique in detecting defects is boosted by an efficient "output deviations" metric for grading the calculated LFSR seeds. We show that, compared to standard compression-driven LFSR reseeding, higher defect coverage is obtained without any loss of compression.

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“…Another solution for improving the efficiency of static LFSR reseeding is to use each seed for generating more than one test vectors [20]. Although this approach improves the degree of variable utilization and, as a result, the compression ratios a lot, it also increases the test-application time significantly, since many pseudorandom patterns are generated and applied to the CUT along with the deterministic ones.…”

Section: Previous Work and Motivationmentioning

confidence: 99%

“…Two of the most popular categories of test-data compression techniques are the code-based ones [1]- [4], [7]- [9], [13], [14], [16]- [18], and the linear-decompressor-based [10]- [12], [15], [20], [21]. The schemes belonging in the first category employ data-compression codes for encoding the test sets of the cores under test (CUTs), whereas those of the second category use linear decompressors (which are, most of the times, Linear Feedback Shift Registers -LFSRs).…”

Section: ι Introductionmentioning

confidence: 99%

LFSR-based test-data compression with self-stoppable seeds

Koutsoupia

Kalligeros

Kavousianos

et al. 2009

2009 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition

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Abstract-The main disadvantage of LFSR-based compression is that it should be usually combined with a constrained ATPG process, and, as a result, it cannot be effectively applied to IP cores of unknown structure. In this paper, a new LFSR-based compression approach that overcomes this problem is proposed. The proposed method allows each LFSR seed to encode as many slices as possible. For achieving this, a special purpose slice, called stop-slice, that indicates the end of a seed's usage is encoded as the last slice of each seed. Thus, the seeds include by construction the information of where they should stop and, for that reason, we call them self-stoppable. A stop-slice generation procedure is proposed that exploits the inherent test set characteristics and generates stop slices which impose minimum compression overhead. Moreover, the architecture for implementing the proposed technique requires negligible additional hardware overhead compared to the standard LFSR-based architecture. The proposed technique is also accompanied by a seed calculation algorithm that tries to minimize the number of calculated seeds.

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State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores

Cited by 22 publications

References 33 publications

A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume

A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume

Defect Coverage-Driven Window-Based Test Compression

LFSR-based test-data compression with self-stoppable seeds

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