Stability in Small Signal Common Base Amplifiers

Green, J. E.; Tozer, R.C.; David, J.P.R.

doi:10.1109/tcsi.2012.2209709

Cited by 8 publications

(10 citation statements)

References 28 publications

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“…To improve stability, the inductive parasitic components should be minimised through proper layout techniques. The following guides can be employed to reduce these parasitic components: Using wide bias lines and interconnects helps to reduce the line inductance [11]. The parasitic inductance appearing in series with the bypass capacitors can be reduced by careful layout of the bypass capacitor and its connections [5].…”

Section: Design Guidelines and Experimental Resultsmentioning

confidence: 99%

“…However, accurate description of the instability mechanisms and stabilisation techniques has not been thoroughly studied in the literature. Several stability analyses have been reported for elementary amplifier structures [10][11][12][13][14]. However, a comprehensive stability analysis is not found for the cascode amplifier at high frequencies.…”

Section: Introductionmentioning

confidence: 99%

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Stability analysis of broadband cascode amplifiers in the presence of inductive parasitic components

Nikandish¹,

Yousefi²,

Medi³

2014

IET Circuits, Devices & Systems

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Theoretical stability analysis of broadband cascode amplifiers at high frequencies is presented. The stability of the amplifier in the presence of parasitic inductive components is thoroughly investigated. It is shown that the stability can be improved by inserting a series resistance in the gate of common-gate device of the cascode amplifier. To ensure stability, the gate resistance should be selected within specific ranges that are derived analytically. Based on the insights provided by the analyses, several practical design guidelines are given to improve the stability of high-frequency broadband cascode amplifiers. Finally, the derived results are adopted in stabilisation of an X-band cascode amplifier implemented in a 0.18 μm complementary metal oxide semiconductor process.

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Section: Design Guidelines and Experimental Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Stability analysis of broadband cascode amplifiers in the presence of inductive parasitic components

Nikandish¹,

Yousefi²,

Medi³

2014

IET Circuits, Devices & Systems

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“…Moreover, it is possible to further enhance the stability by adding base stopper resistor at the base of Q1 shown in Fig. 1 [19].…”

Section: A Negative Impedance Converter Designmentioning

confidence: 99%

Demonstration of Negative Impedance Conversion for Bandwidth Extension in VLC

Kassem

Darwazeh

2020

2020 IEEE International Symposium on Circuits and Systems (ISCAS)

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This work proposes and demonstrates the utility of a negative impedance converter (NIC) circuit, based on a common collector (CC) amplifier, for the generation of negative capacitance. The design principle of the proposed NIC is introduced, then a negative capacitance equals −200 pF is demonstrated using discrete devices constructed on a printed circuit board (PCB). The designed NIC is applied for the bandwidth extension of LEDs to enhance the achievable data rates in visible light communication (VLC) systems. The paper includes analytical derivations of the obtained negative capacitance as a function of circuit parameters and verifies this by both simulation and experimentally. Measurements show significant bandwidth extension by neutralising the bandwidth-limiting effect of the LED diffusion capacitance through the introduction of a parallel negative capacitance.

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“…The EM-circuit co-simulation approach ensures that all parasitics related to the particular layout and technology are accurately taken into account [22, 23]. Resistive feedback networks are used as self-bias and for stabilization [26]. The EM-simulation approach ensures that all the parasitic effects are inherently taken into account during the optimization process.…”

Section: Circuit Analysis and Designmentioning

confidence: 99%

Optimization of InP DHBT stacked-transistors for millimeter-wave power amplifiers

Squartecchia¹,

Johansen²,

Dupuy

et al. 2018

Int. J. Microw. Wireless Technol.

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In this paper, we report the analysis, design, and implementation of stacked transistors for power amplifiers realized on InP Double Heterojunction Bipolar Transistors (DHBTs) technology. A theoretical analysis based on the interstage matching between all the single transistors has been developed starting from the small-signal equivalent circuit. The analysis has been extended by including large-signal effects and layout-related limitations. An evaluation of the maximum number of transistors for positive incremental power and gain is also carried out. To validate the analysis, E-band three- and four-stacked InP DHBT matched power cells have been realized for the first time as monolithic microwave integrated circuits (MMICs). For the three-stacked transistor, a small-signal gain of 8.3 dB, a saturated output power of 15 dBm, and a peak power added efficiency (PAE) of 5.2% have been obtained at 81 GHz. At the same frequency, the four-stacked transistor achieves a small-signal gain of 11.5 dB, a saturated output power of 14.9 dBm and a peak PAE of 3.8%. A four-way combined three-stacked MMIC power amplifier has been implemented as well. It exhibits a linear gain of 8.1 dB, a saturated output power higher than 18 dBm, and a PAE higher than 3% at 84 GHz.

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Stability in Small Signal Common Base Amplifiers

Cited by 8 publications

References 28 publications

Stability analysis of broadband cascode amplifiers in the presence of inductive parasitic components

Stability analysis of broadband cascode amplifiers in the presence of inductive parasitic components

Demonstration of Negative Impedance Conversion for Bandwidth Extension in VLC

Optimization of InP DHBT stacked-transistors for millimeter-wave power amplifiers

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