Stability analysis & design of hysteretic current-mode switched-inductor buck DC-DC converters

Abstract

Battery-supplied systems demand fast, power efficient, and compact power supplies. Although linear regulators are quick and small, tiny batteries cannot sustain their losses for long. Pulse-width-modulated (PWM) switchers are considerably more efficient, but also slower. Luckily, hysteretic converters can respond within one switching cycle. Stabilizing the system for maximum speed with a hysteretic inductor-current loop, however, which is not linear, is not straightforward. This paper shows how load dumps delay the response of the hysteretic oscillator that the current loop implements. Knowing the worse-case dump and the delay it causes reveals the lowest output capacitance that maintains stable operation at maximum speed. The converter designed here can therefore recover, as predicted, from 100-mA load dumps in 2 µs with 10 µF and 45° of phase margin.Index Terms-Hysteretic current-mode control, design, analysis, dc-dc switching converter, stability, high bandwidth I. SWITCHED-INDUCTOR CONVERTERS Cellular phones, tablets, and other portable electronics today include on-demand functions like data conversion, telemetry, and others that require fast-responding and power-efficient supplies. Low-dropout (LDO) regulators are fast and compact, but not as efficient as their switchedinductor counterparts. Pulse-width-modulated (PWM) supplies are therefore popular, except they require several clock cycles to respond to load dumps. Luckily, hysteretic loops respond when their controlled variables surpass their window limits, so they react within one switching cycle [1].Unfortunately, understanding the nonlinear feedback dynamics of hysteretic converters is arduous. Phase-plot portraits [2], sliding-mode theory [3]-[5], state-space averaging [6]-[7], and circuit averaging [8]- [12] help, but the equations they generate are often abstract and difficult to relate to circuit operation, to inductor-current and outputvoltage ripples, response time, and others. This is why engineers ultimately over-size inductors or capacitors, and in so doing, counter their own miniaturization efforts.This paper analyses hysteretic current-mode buck dc-dc converters from the perspective of a circuit-design engineer. In this light, as Section II explains, the hysteretic current loop implements an oscillator, whose closed-loop gain and delay Section III describes and quantifies. Section IV later discusses how the oscillator block affects the feedback dynamics of the voltage loop. Section V then verifies the analysis and design strategy for maximum speed and Section VI draws relevant conclusions. II. DESIGN STRATEGYWith enough equivalent series resistance (ESR) in the output capacitor, hysteretic buck converters can be simple and widely stable. This is because ESRs save some of the phase inductors and capacitors lose with the poles they establish. Unfortunately, state-of-the-art systems cannot afford to accommodate the voltage these ESRs produce when responding to sudden load dumps. So, with little to no ESR, engineers resort to removing the influen...

Hybrid control concept for highly dynamic buck converter systems

“…The hysteretic control concept is another common solution for DC-DC converters [11], [12]. The hysteretic control combines simplicity of implementation and excellent robustness to large signal load disturbances with a timeoptimal transient performance.…”