2011
DOI: 10.1145/2043643.2043647
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SpiNNaker

Abstract: The design and implementation of globally asynchronous locally synchronous systems-on-chip is a challenging activity. The large size and complexity of the systems require the use of computer-aided design (CAD) tools but, unfortunately, most tools do not work adequately with asynchronous circuits. This article describes the successful design and implementation of SpiNNaker, a GALS multicore system-on-chip. The process was completed using commercial CAD tools from synthesis to layout. A hierarchical methodology … Show more

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Cited by 35 publications
(7 citation statements)
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“…Hardware platforms for spiking neural network computations have advantages over software simulations in terms of performance and power consumption. For example, SpiNNaker (Plana et al, 2011) combines cheap, generic, yet dedicated CPU boards together to create a powerful SNN simulation framework in hardware. Other platforms (e.g., TrueNorth Akopyan et al, 2015, HRL, and Braindrop) involve the design of a new chip.…”
Section: Discussionmentioning
confidence: 99%
See 1 more Smart Citation
“…Hardware platforms for spiking neural network computations have advantages over software simulations in terms of performance and power consumption. For example, SpiNNaker (Plana et al, 2011) combines cheap, generic, yet dedicated CPU boards together to create a powerful SNN simulation framework in hardware. Other platforms (e.g., TrueNorth Akopyan et al, 2015, HRL, and Braindrop) involve the design of a new chip.…”
Section: Discussionmentioning
confidence: 99%
“…is an open source project, written in Python, and supports a (Abadi et al, 2015) backend to improve simulation speed and exploit some limited ML functionality. It also has options for deploying neural models on dedicated hardware platforms; e.g., SpiNNaker (Plana et al, 2011). (Beyeler et al, 2015) and (Fidjeland et al, 2009) also focus on the high-level aspects of SNNs and are thus good candidates for applications in machine learning.…”
Section: Review Of Snn Software Packagesmentioning
confidence: 99%
“…The time cost for spiking learning algorithms is rather large and usually executed on parallel computing units, such as FPGA and Memristor. Also develop chips or system-on-chip for spiking neural networks have been used, see SpiNNaker 70 and TrueNorth. 71 The complexity of spiking learning algorithms is much higher than that of other machine learning algorithms.…”
Section: Algorithm Complexity Analysismentioning
confidence: 99%
“…The power supply of the SpiNN-3 board is 5V 1A via a 2.1mm DC port. For peripheral connections, the SpiNN-3 board has 2 ports: ports J1 and J2 that are 34way sub-miniature head socket [15]. The pin assignments are shown in Fig.…”
Section: A Spinnakermentioning
confidence: 99%
“…After MCU receives the events from input sensors, MCU will encode the data into packets and send them to SpiNNaker in real-time. There are two types of SpiNNaker packets of different sizes: 40 bits and 72 bits [15]. 'EOP' symbols are placed after each packet to show that the transmission of that packet was completed.…”
Section: Encoding / Decoding Packetsmentioning
confidence: 99%