Spiking Neural Network Using Synaptic Transistors and Neuron Circuits for Pattern Recognition With Noisy Images

Kim, Hyungjin; Hwang, Sungmin; Park, Jungjin; Yun, Sangdoo; Lee, Jong‐Ho; Park, Byung‐Gook

doi:10.1109/led.2018.2809661

Cited by 70 publications

(42 citation statements)

References 26 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…Neuromorphic computing architecture based on spiking neural networks (SNNs) has been recognized as an attractive candidate for its promising energy efficiency and powerful computing capacity 6–8 . Recently, various technologies have been explored to build hardware SNNs, such as digital logic circuits 7,8 , complementary metal-oxide semiconductor (CMOS) analog circuits 9,10 , and emerging memristors 11–13 . Given the physical limit of transistors and their lack of desirable dynamics, memristors have attracted special attention owing to their high integration intensity 14 , low power consumption 15 , analog behavior 16–18 , and diffusive dynamics 13,19–21 , etc.…”

Section: Introductionmentioning

confidence: 99%

An artificial spiking afferent nerve based on Mott memristors for neurorobotics

et al. 2020

View full text Add to dashboard Cite

Neuromorphic computing based on spikes offers great potential in highly efficient computing paradigms. Recently, several hardware implementations of spiking neural networks based on traditional complementary metal-oxide semiconductor technology or memristors have been developed. However, an interface (called an afferent nerve in biology) with the environment, which converts the analog signal from sensors into spikes in spiking neural networks, is yet to be demonstrated. Here we propose and experimentally demonstrate an artificial spiking afferent nerve based on highly reliable NbOx Mott memristors for the first time. The spiking frequency of the afferent nerve is proportional to the stimuli intensity before encountering noxiously high stimuli, and then starts to reduce the spiking frequency at an inflection point. Using this afferent nerve, we further build a power-free spiking mechanoreceptor system with a passive piezoelectric device as the tactile sensor. The experimental results indicate that our afferent nerve is promising for constructing self-aware neurorobotics in the future.

show abstract

Section: Introductionmentioning

confidence: 99%

An artificial spiking afferent nerve based on Mott memristors for neurorobotics

et al. 2020

View full text Add to dashboard Cite

show abstract

“…In spite of this structure, the program operation can still be performed by CHEI at the source side; as for the erase operation, instead, a positive voltage is applied between the gate and source, resulting in the emission of stored electrons toward the gate by FN tunneling. Although, recently, some more effort was devoted to build new custom synaptic devices and test them in SNNs [49][50][51], a more convincing proof of the feasibility of the floating-gate transistor to build large-scale neuromorphic systems comes from a different approach. The basic idea consists in slightly modifying the routing of commercially available NOR Flash memory arrays to enable a single-cell selective erase operation while keeping the cell structure unchanged.…”

Section: Memory Transistors As Synaptic Devices In Artificial Neural mentioning

confidence: 99%

Memristive and CMOS Devices for Neuromorphic Computing

et al. 2020

View full text Add to dashboard Cite

Neuromorphic computing has emerged as one of the most promising paradigms to overcome the limitations of von Neumann architecture of conventional digital processors. The aim of neuromorphic computing is to faithfully reproduce the computing processes in the human brain, thus paralleling its outstanding energy efficiency and compactness. Toward this goal, however, some major challenges have to be faced. Since the brain processes information by high-density neural networks with ultra-low power consumption, novel device concepts combining high scalability, low-power operation, and advanced computing functionality must be developed. This work provides an overview of the most promising device concepts in neuromorphic computing including complementary metal-oxide semiconductor (CMOS) and memristive technologies. First, the physics and operation of CMOS-based floating-gate memory devices in artificial neural networks will be addressed. Then, several memristive concepts will be reviewed and discussed for applications in deep neural network and spiking neural network architectures. Finally, the main technology challenges and perspectives of neuromorphic computing will be discussed.

show abstract

“…Therefore, SNNs adopting the ANN-to-SNN conversion cannot update themselves depending on various system situations and only perform the inference process for a given task. For this reason, the performance of SNNs that adopt conversion is sensitive to unexpected variations of hardware and cannot save the power consumption required for training a weight ( Kim H. et al, 2018 ; Yu, 2018 ). In contrast, SNNs using on-chip training schemes that can update weights on the chip can have immunity against device variation or noise ( Querlioz et al, 2013 ; Kwon et al, 2019 ).…”

Section: Introductionmentioning

confidence: 99%

On-Chip Training Spiking Neural Networks Using Approximated Backpropagation With Analog Synaptic Devices

et al. 2020

Self Cite

View full text Add to dashboard Cite

Hardware-based spiking neural networks (SNNs) inspired by a biological nervous system are regarded as an innovative computing system with very low power consumption and massively parallel operation. To train SNNs with supervision, we propose an efficient on-chip training scheme approximating backpropagation algorithm suitable for hardware implementation. We show that the accuracy of the proposed scheme for SNNs is close to that of conventional artificial neural networks (ANNs) by using the stochastic characteristics of neurons. In a hardware configuration, gated Schottky diodes (GSDs) are used as synaptic devices, which have a saturated current with respect to the input voltage. We design the SNN system by using the proposed on-chip training scheme with the GSDs, which can update their conductance in parallel to speed up the overall system. The performance of the on-chip training SNN system is validated through MNIST data set classification based on network size and total time step. The SNN systems achieve accuracy of 97.83% with 1 hidden layer and 98.44% with 4 hidden layers in fully connected neural networks. We then evaluate the effect of non-linearity and asymmetry of conductance response for long-term potentiation (LTP) and long-term depression (LTD) on the performance of the on-chip training SNN system. In addition, the impact of device variations on the performance of the on-chip training SNN system is evaluated.

show abstract

Spiking Neural Network Using Synaptic Transistors and Neuron Circuits for Pattern Recognition With Noisy Images

Cited by 70 publications

References 26 publications

An artificial spiking afferent nerve based on Mott memristors for neurorobotics

An artificial spiking afferent nerve based on Mott memristors for neurorobotics

Memristive and CMOS Devices for Neuromorphic Computing

On-Chip Training Spiking Neural Networks Using Approximated Backpropagation With Analog Synaptic Devices

Contact Info

Product

Resources

About