Speculative Decoupled Software Pipelining

Vachharajani,; Rangan,; Raman,; Bridges, Patrick G.; Ottoni,; August,

doi:10.1109/pact.2007.4336199

Cited by 82 publications

(72 citation statements)

References 29 publications

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“…However, the synchronization overhead in the software queue negates the benefits of overlapping, as the producer and consumer threads have read/write dependencies on the queue. To mitigate such synchronization overheads, speculative decoupled software pipelining [25] splits recursive data structure traversals into two hardware contexts and performs synchronization via specialized hardware arrays with support for resolving dependencies. As of now, such hardware support is not found in off-the-shelf processors.…”

Section: Related Workmentioning

confidence: 99%

Asynchronous memory access chaining

Kocberber¹,

Falsafi²,

Grot

2015

Proc. VLDB Endow.

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In-memory databases rely on pointer-intensive data structures to quickly locate data in memory. A single lookup operation in such data structures often exhibits long-latency memory stalls due to dependent pointer dereferences. Hiding the memory latency by launching additional memory accesses for other lookups is an effective way of improving performance of pointer-chasing codes (e.g., hash table probes, tree traversals). The ability to exploit such inter-lookup parallelism is beyond the reach of modern out-of-order cores due to the limited size of their instruction window. Instead, recent work has proposed software prefetching techniques that exploit inter-lookup parallelism by arranging a set of independent lookups into a group or a pipeline, and navigate their respective pointer chains in a synchronized fashion. While these techniques work well for highly regular access patterns, they break down in the face of irregularity across lookups. Such irregularity includes variable-length pointer chains, early exit, and read/write dependencies.This work introduces Asynchronous Memory Access Chaining (AMAC), a new approach for exploiting interlookup parallelism to hide the memory access latency. AMAC achieves high dynamism in dealing with irregularity across lookups by maintaining the state of each lookup separately from that of other lookups. This feature enables AMAC to initiate a new lookup as soon as any of the in-flight lookups complete. In contrast, the static arrangement of lookups into a group or pipeline in existing techniques precludes such adaptivity. Our results show that AMAC matches or outperforms state-of-the-art prefetching techniques on regular access patterns, while delivering up to 2.3x higher performance under irregular data structure lookups. AMAC fully utilizes the available microarchitectural resources, generating the maximum number of memory accesses allowed by hardware in both single-and multi-threaded execution modes.

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Section: Related Workmentioning

confidence: 99%

Asynchronous memory access chaining

Kocberber¹,

Falsafi²,

Grot

2015

Proc. VLDB Endow.

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“…Inspired by Speculative Decoupled Software Pipelining (Spec-DSWP) [17], DAFT exploits such a high-confidence value speculation to break the cyclic dependencies. More specifically, the communication dependence between signal and wait instructions is removed.…”

Section: Software Speculation In Daft: Removing Cyclic Dependenciesmentioning

confidence: 99%

DAFT: Decoupled Acyclic Fault Tolerance

Zhang

Lee

Johnson

et al. 2011

Int J Parallel Prog

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Higher transistor counts, lower voltage levels, and reduced noise margin increase the susceptibility of multicore processors to transient faults. Redundant hardware modules can detect such errors, but software transient fault detection techniques are more appealing for their low cost and flexibility. Recent software proposals double register pressure or memory usage, or are too slow in the absence of hardware extensions, preventing widespread acceptance. This paper presents DAFT, a fast, safe, and memory efficient transient fault detection framework for commodity multicore systems. DAFT replicates computation across multiple cores and schedules fault detection off the critical path. Where possible, values are speculated to be correct and only communicated to the redundant thread at essential program points. DAFT is implemented in the LLVM compiler framework and evaluated using SPEC CPU2000 and SPEC CPU2006 benchmarks on a commodity multicore system. Results demonstrate DAFT's high performance and broad fault coverage. Speculation allows DAFT to reduce the performance overhead of software redundant multithreading from an average of 200% to 38% with no degradation of fault coverage.

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“…Vachharajani, et al [18] add speculation to Decoupled Software Pipelining (DSWP). DSWP parallelizes a loop by partitioning the loop body into stages that are scheduled on threads and executed in a pipelined manner, communicating results via a message passing or buffering mechanism.…”

Section: Dynamic Loop Parallelizationmentioning

confidence: 99%

Runtime parallelization of legacy code on a transactional memory system

DeVuyst

Tullsen

Kim³

2011

Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers

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This paper proposes a new runtime parallelization technique, based on a dynamic optimization framework, to automatically parallelize single-threaded legacy programs. It heavily leverages the optimistic concurrency of transactional memory. This work addresses a number of challenges posed by this type of parallelization and quantifies the trade-offs of some of the design decisions, such as how to select good loops for parallelization, how to partition the iteration space among parallel threads, how to handle loop-carried dependencies, and how to transition from serial to parallel execution and back. The simulated implementation of runtime parallelization shows a potential speedup of 1.36 for the NAS benchmarks and a 1.34 speedup for the SPEC 2000 CPU floating point benchmarks when using two cores for parallel execution.

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Speculative Decoupled Software Pipelining

Cited by 82 publications

References 29 publications

Asynchronous memory access chaining

Asynchronous memory access chaining

DAFT: Decoupled Acyclic Fault Tolerance

Runtime parallelization of legacy code on a transactional memory system

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