2023 IEEE 41st VLSI Test Symposium (VTS) 2023
DOI: 10.1109/vts56346.2023.10140057
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Special Session: Security Verification & Testing for SR-Latch TRNGs

Abstract: Secure chips implement cryptographic algorithms and protocols to ensure self-protection (e.g., firmware authenticity) as well as user data protection (e.g., encrypted data storage). In turn, cryptography needs to defer to incorruptible sources of entropy to implement their functions according to their mandatory usage guidance. Typically, keys, nonces, initialization vectors, tweaks, etc. shall not be guessed by attackers. In practice, True Random Number Generators (TRNGs) are in charge of producing such sensit… Show more

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Cited by 2 publications
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