SPC04-1: Quality-Energy Scalable Chip Level Equalization for HSDPA

Li, Min; Bougard, Bruno; Horlin, François; Engels, M.; Perre, Liesbet; Catthoor, Francky

doi:10.1109/glocom.2006.550

Cited by 5 publications

(4 citation statements)

References 15 publications

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“…We can observe that, with negligible BER degradations, the design can reduce more than 60% energy comparing to the conventional static equalizer. More details of the work can be found in [13].…”

Section: Implementation Resultsmentioning

confidence: 99%

“…This technique can be applied to most components of wireless transceivers because multiple algorithmic options are usually available for a given signal processing functionality. We have demonstrated this in an HSDPA (High Speed Downlink Packet Access) chip level equalizer implementation [13]. Specially, A NLMS (Normalized Least Mean Square) algorithm and a SRI-RLS (Square Root Information-Recursive Least Square) algorithm are combined.…”

Section: Combining Multiple Algorithmsmentioning

confidence: 97%

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Energy Aware Signal Processing for Software Defined Radio Baseband Implementation

Novo

Bougard

et al. 2009

J Sign Process Syst

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The fast pacing diversity and evolution of wireless communications require a wide variety of baseband implementations within a short time-to-market. Besides, the exponentially increased design complexity and design cost of deep sub-micron silicon highly desire the designs to be reused as much as possible. This yields an increasing demand for reconfigurable/ programmable baseband solutions. Implementing all baseband functionalities on programmable architectures, as foreseen in the tier-2 SDR, will become necessary in the future. However, the energy efficiency of SDR baseband platforms is a major concern. This brings a challenging gap that is continuously broadened by the exploding baseband complexity. We advocate a system level approach to bridge the gap. Specifically, we fully leverage the advantages (programmability) of SDR platforms to compensate its disadvantages (energy efficiency). Highly flexible and dynamic baseband signal processing algorithms are designed and implemented to exploit the abundant dynamics in the environment and the user requirement. Instead of always performing the best effort, the baseband can dynamically and autonomously adjust its work load to optimize the average energy consumption. In this paper, we will introduce such baseband signal processing techniques optimized for SDR implementations. The methodology and design steps will be presented together with 3 representative case studies in HSDPA, WiMAX and 3GPP LTE.

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Section: Implementation Resultsmentioning

confidence: 99%

Section: Combining Multiple Algorithmsmentioning

confidence: 97%

Energy Aware Signal Processing for Software Defined Radio Baseband Implementation

Novo

Bougard

et al. 2009

J Sign Process Syst

Self Cite

View full text Add to dashboard Cite

show abstract

“…In this sub-section we introduce the controller that makes decision for algorithm switching. We proposed an efficient but effective solution based on feedback control with proportion-integral-difference (PID) algorithm [24,25]. The diagram of the algorithm switching scheme is depicted in Fig.…”

Section: Controller For Algorithm Switchingmentioning

confidence: 99%

“…However, the family of adaptive equalizer algorithms has countless members, even LMS itself has many variants, and many other advanced algorithms are also widely applied in practical equalizer implementations. For instance, the orthogonal-triangulardecomposition (QRD) based adaptive filter utilizing orthogonalization/projection principles are often applied to track fast fading channels [24,25].…”

Section: Variable Length Equalizermentioning

confidence: 99%

Energy Aware Algorithm and Implementation of SDR Oriented HSDPA Chip Level Equalizer

Bougard

Perre

et al. 2008

J Sign Process Syst Sign Image Video Technol

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The flexibility and programmability of SDR come at the expense of reduced efficiency and increased energy consumption. This is usually considered as the penalty of SDR. However, the flexibility and programmability have great potentials for improving the system-wide efficiency if they are properly exploited. In this paper, we present a HSDPA chip equalizer that is explicitly designed for SDR implementations. The first SDR-specific feature of our work is the multi-mode operation based on heterogeneous algorithms. The proposed equalizer combines an optimized LMS variant (with subspace-aware extension) and an optimized SRI-RLS algorithm based on QRD. Instead of always applying the powerful SRI-RLS algorithm, the equalizer switches to simple LMS-variant when possible. With negligible BER degradation, the multi-mode operation can reduce 60% of the cycle-count on TI TMS320C6713 for 3GPP case 4 with 16QAM modulation. The proposed equalizer framework also incorporates a generic, robust and efficient scheme for equalization-length adaptation. The length-adaptation scheme can make very fast run-time decision based on an efficient policy-template, which is optimized with large training set at design time. We test 14 representative channel profiles specified in ITU-R M.1225, 3GPP TR 25.943 and 3GPP TS 25.101. Comparing to worst-case based design the length-adaptation achieves more than 10× cycle-count reductions for ten of the cases.

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Energy-Aware Cross-Layer Radio Management

Green Software Defined Radios

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SPC04-1: Quality-Energy Scalable Chip Level Equalization for HSDPA

Cited by 5 publications

References 15 publications

Energy Aware Signal Processing for Software Defined Radio Baseband Implementation

Energy Aware Signal Processing for Software Defined Radio Baseband Implementation

Energy Aware Algorithm and Implementation of SDR Oriented HSDPA Chip Level Equalizer

Energy-Aware Cross-Layer Radio Management

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