Spatio-temporal learning with arrays of analog nanosynapses

Abstract

Emerging nanodevices such as resistive memories are being considered for hardware realizations of a variety of artificial neural networks (ANNs), including highly promising online variants of the learning approaches known as reservoir computing (RC) and the extreme learning machine (ELM). We propose an RC/ELM inspired learning system built with nanosynapses that performs both on-chip projection and regression operations. To address time-dynamic tasks, the hidden neurons of our system perform spatio-temporal integration and can be further enhanced with variable sampling or multiple activation windows. We detail the system and show its use in conjunction with a highly analog nanosynapse device on a standard task with intrinsic timing dynamics-the TI-46 battery of spoken digits. The system achieves nearly perfect (99%) accuracy at sufficient hidden layer size, which compares favorably with software results. In addition, the model is extended to a larger dataset, the MNIST database of handwritten digits. By translating the database into the time domain and using variable integration windows, up to 95% classification accuracy is achieved. In addition to an intrinsically low-power programming style, the proposed architecture learns very quickly and can easily be converted into a spiking system with negligible loss in performance-all features that confer significant energy efficiency.

Recent advances in physical reservoir computing: A review

“…The use of memristor crossbar arrays in the readout part of ESNs was proposed for a digital (or mixed signal) reservoir with a doubly twisted toroidal structure (Kudithipudi et al, 2016). A more general on-chip system using analog memristive nanosynapses was presented for emulating a reservoir computer and performing recognition tasks (Bennett et al, 2017).…”

Obtaining hydrogen for fuel cells using finely dispersed silicon

“…The storage matrix based on the crossbar of complementary memr istors [5], in contrast to the memory matrices used in information technologies, in addition to infor mation storage allows the weighing and summation of the voltages of the input signals passing through the memr istors. However, it can not be used The problem of energy efficiency of an ultra-large memor y matr ix is solved by using a complement a r y mem r istordiode cell, which is a two-layered interconnection of complementary bipolar memristors and one Zener separating diode.…”

“…Запоминающая матрица на основе кроссбара из комплементарных мемристоров [5] в отличие от запоминающих матриц, используемых в информационных технологиях, помимо хранени я информа ции позвол яет производить взвешива ние и с уммирова ние на пря жений входных сигналов, проходящих через мемрис торы. Одна ко она не может быть использована в качестве сверхбольшой запоминающей матрицы нейропроцессора из-за низкой энергоэффективности при записи и высокой деградации выходного сигнала при считывании вследствие того, что в запоминающей ячейке отсутствует нелинейный селективный элемент.…”

“…Диод Зенера выступает в качестве селективного элемента и предотвращает паразитную запись в соседние ячейки кроссбара через смежные шины. Для исключения этой паразитной записи в матрице без диодов [5] на незадействованные шины подается половина напряжения записи, что приводит к увеличению энергопотребления.…”

“…The Zener diode acts as a selective element and prevents parasitic recording into adjacent crossbar cells v ia adjacent buses. To el im inate this parasitic record in the matrix without diodes [5], half of the write voltage is applied to t he u nu se d bu ses, wh ic h leads to an increase in power consumption.…”