Sparse Random Signals for Fast Convergence on Invertible Logic

Abstract

This paper introduces sparse random signals for fast convergence on invertible logic. Invertible logic based on a network of probabilistic nodes (spins), similar to a Boltzmann machine, can compute functions bidirectionally by reducing the network energy to the global minimum with the addition of random signals. Here, we propose using sparse random signals that are generated by replacing a part of the typical dense random signals with zero values in probability. The sparsity of the random signals can induce a relatively relaxed transition of the spin network, reaching the global minimum energy at high probabilities. As a typical design example of invertible logic, invertible adders and multipliers are designed and evaluated. The simulation results show that the convergence speed with the proposed sparse random signals is roughly an order of magnitude faster than that with the conventional dense random signals. In addition, several key parameters are found and could be a guideline for fast convergence on general invertible logic.

Self-Adaptive Gate Control for Efficient Escape From Local Minimum Energy on Invertible Logic

“…In terms of the overhead of SAGC, the computation is more complex than the conventional methods [14], [17]. To evaluate the overhead, the simulation time per cycle is evaluated in the 8 × 8 invertible multiplier in the backward mode corresponding to Fig 12. with 64 GB.…”

“…To achieve rapid convergence of invertible logic, sparse random signals are introduced as an alternative noise-control method [17]. With the sparse random signals, (4a) is replaced as follows: In small-scale invertible logic circuits, convergence to the global minimum energy is realized with a high probability using the conventional noise-control methods.…”

“…The proposed SAGC method is now compared with the conventional methods [14], [17]. For the performance comparison, invertible adders, multiplexers, and multipliers are designed based on [22], and the corresponding Hamiltonians are used.…”

“…In invertible logic, the reason for being stuck at the local minimum has not been clear. Conventional methods globally add noise to all spins with the same magnitude in order to reach the global minimum energy [11], [14], [17]. The global noise makes it difficult to precisely control each gate, which can lead to getting stuck at the local minimum energy.''…”

Enhanced convergence in p-bit based simulated annealing with partial deactivation for large-scale combinatorial optimization problems

“…(4a) The second algorithm is simulated annealing based on stalled p-bit (SpSA). SpSA takes inspiration from the sparse random signals used in invertible logic operations 42 . Invertible logic is an application of p-bits, which permits bidirectional operations of any function.…”