Space Division Switches Based on Semiconductor Optical Amplifiers

Kalman, Robert F.; Kazovsky, L.G.; Goodman, Joseph W.

doi:10.21236/ada247619

Cited by 7 publications

(10 citation statements)

References 2 publications

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“…From Fig. 3.b and by using the expression of the power consumption of a cascade of SOA and passive elements reported in [14]- [15], the expressions Eqs (6)- (8) reported at page 3 can be obtained for C SOA i (i=1, 2, 3), wherein:…”

Section: Analytical Evaluation Of the Power Consumption In Spankmentioning

confidence: 99%

Evaluation of power consumption of Spanke Optical Packet Switch

et al. 2011

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The power consumption of an Optical Packet Switch equipped with SOA technology based Spanke switching fabric is evaluated. Sophisticated analytical models are introduced to evaluate the power consumption versus the offered traffic, the main switch parameters, and the used device characteristics. The impact of Amplifier Spontaneous Emission (ASE) noise generated by a transmission system on the power consumption is investigated. As a matter of example for 32 × 32 switches supporting 64 wavelengths and offered traffic equal to 0,8, the average energy consumption per bit is 5, 07 · 10 −2 nJ/bit and increases if ASE noise introduced by the transmission systems is increased.

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Section: Analytical Evaluation Of the Power Consumption In Spankmentioning

confidence: 99%

Evaluation of power consumption of Spanke Optical Packet Switch

et al. 2011

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“…SOA-Based Cross Connects: A 1 Pb/s 25,000 x 25,000 SOA-based cross-connect using a distributed gain structure [7] requires a total of 30 stages and a total of 18.8 x 108 SOA gates. The loss per stage is 3 dB.…”

Section: Cross Connectsmentioning

confidence: 99%

“…CMOS Cross Connects: Fig. 2(b) shows a schematic of a three-stage 1 Pb/s Clos cross-connect using 13 Tb/s (320 x 320) and 3.2 Tb/s (80 x 160) CMOS cross-connect chips at line rates of 40 Gb/s, with assumed chip power dissipations of 20 W and 5 W per chip, respectively [7], [1]. We assume chip areas on the order of 500 mm2 for the (320 x 320) chips and 100 mm2 for the (80 x 60) chips.…”

Section: Cross Connectsmentioning

confidence: 99%

Petabit-per-second routers: optical vs. electronic implementations

Tucker

2006

2006 Optical Fiber Communication Conference and the National Fiber Optic Engineers Conference

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“…This is not strictly an issue since optical switching fabrics that operate in the nanosecond region have been reported [7] and the requirement is only to operate at the packet rate, which is much slower. But a slower switching rate could potentially save costs by allowing a cheaper and slower switching matrix to be used.…”

Section: Buffering Mechanism With Ack Schedulingmentioning

confidence: 99%

Minimising the size of voids in optical packet switching using a novel packet scheduling algorithm

Chin¹,

Chien²,

Low³

et al. 2006

BT Technol J

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In this paper, we propose a new packet scheduling algorithm to minimise the size of voids in optical packet switching. The effects of excess load, output utilisation, and packet loss probability are closely studied. Other contributing factors to the packet loss probability, which include the buffer depth and the numbers of wavelength channels, are also investigated. The proposed algorithm is of importance to next generation networks where broadband capabilities with end-to-end quality of service over all-IP optical networks is envisaged. IntroductionWhen optical packet switching (OPS) was first proposed in the research community, it was hoped that it would become a remedy to the shortcoming of electronic packet switching, handling large bandwidths with minimal intelligence [1,2]. The early proposals by RACE ATMOS, ACTS KEOPS, and others that followed, were based on the assumption that ATM would be the dominant technology at the time optical packet switches were deployed. However, as time passes, ATM has not been as popular as had been anticipated. Instead, the future of ATM is being challenged by the introduction of MPLS in the WAN and Ethernet in the LAN. Consequently, optical packet switching, with the capability to handle variable-length packets, is being introduced as an alternative to ATM technology. Processing variable length packets optically requires intelligence in the switching process in order to reduce packet loss probability [3]. In order to increase the network utilisation, it is necessary to decrease the size and frequency of voids by increasing the buffer granularity. To further decrease the void sizes, ACK packets are scheduled to fill in additional gaps.In this paper we consider the reasons for void formation and propose a buffering mechanism with a new ACK scheduling algorithm. Simulations of the new algorithm are presented and the results discussed. Void formingIn IP networks, having variable packet lengths (rather than fixed length packets) results in packet synchronisation processes at input ports becoming much more complicated and difficult. One of the problems with buffering variable-length IP packets is the setting of optical delay lines to match the sizes of the packets. Since the sizes of IP packets vary in a wide range from 40 bytes to around 1500 bytes, it is practically impossible to set up the delay lines to have the same granularity (the step increase of delay lines which are assumed to be uniform) and at the same time have a reasonable buffer depth (the number of delay lines). Failing to match the sizes of the IP packets to the delay lines will create unnecessary spaces at the output link, referred to as voids, and causes high excess utilisation (defined as a ratio of the generated voids in bytes over the total transmitted bytes [4]). The voids and excess utilisation, is a result of the delay line mismatch; however, such phenomena can also be caused by the difference in arrival times between packets from different sources, which is referred to as arrival time mismatch. Figure 1 il...

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Space Division Switches Based on Semiconductor Optical Amplifiers

Cited by 7 publications

References 2 publications

Evaluation of power consumption of Spanke Optical Packet Switch

Evaluation of power consumption of Spanke Optical Packet Switch

Petabit-per-second routers: optical vs. electronic implementations

Minimising the size of voids in optical packet switching using a novel packet scheduling algorithm

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